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Robert Lee Lomenick

from Colorado Springs, CO
Age ~67
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Also known as:
Robert L Lomenick, Lee R Lomenick
Phone and address:
1963 Pine Mesa Grv, Colorado Springs, CO 80918
(321) 917-0850
Related to:
Todd Lomenick, 47John Fox, 76Ashley J Madison, 32Kevin Hagan, 50Sandra Fox, 56Dennis C Ricker, 54
Connected to:
Nancy S Lomenick, 68Victoria J Lomenzo, 33Karen A Lometti, 63Janelle L Lomheim, 63Justin M Lomheim, 43Anna C Lomibao, 49Dan S Lomibao, 75Edison J Lomibao, 38Marie M Lomibao, 62Jeffrey A Lomicka, 65

Robert Lomenick Phones & Addresses

  • 1963 Pine Mesa Grv, Colorado Spgs, CO 80918 (321) 917-0850
  • Colorado Springs, CO
  • 721 Nelda Ave, Palm Bay, FL 32907 (321) 724-6294
  • Melbourne, FL
  • 1963 Pine Mesa Grv, Colorado Springs, CO 80918 (321) 724-6294

Resumes

Resumes

Robert Lomenick Photo 1

Senior Manager

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Location:
Colorado Springs, CO
Industry:
Semiconductors
Work:
Intersil
Senior Manager
Robert Lomenick Photo 2

Senior Manager, Technology Device Modeling

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Location:
1963 Pine Mesa Grv, Colorado Springs, CO 80918
Industry:
Semiconductors
Work:
Intersil
Sr. Manager Technology Development
Skills:
Development
Distribution
Technology
Strategic Account
Technology Development

Publications

Us Patents

Active Area Bonding Compatible High Current Structures

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US Patent:
7795130, Sep 14, 2010
Filed:
Apr 19, 2007
Appl. No.:
11/737392
Inventors:
John T. Gasner - Satellite Beach FL, US
Michael D. Church - Sebastian FL, US
Sameer D. Parab - Fremont CA, US
David A. Decrosta - Melbourne FL, US
Robert Lomenick - Palm Bay FL, US
Chris A. McCarty - Melbourne FL, US
Assignee:
Intersil Americas Inc. - Milipitas CA
International Classification:
H01L 21/44
US Classification:
438614, 438618, 438622, 438624, 257779, 257E23019, 257E2302
Abstract:
A method of forming a semiconductor structure is provided. One method comprises forming a device region between a substrate and a bond pad. Patterning a conductor between the bond pad and the device region with gaps. Filling the gaps with insulation material that is harder than the conductor to form pillars of relatively hard material that extend through the conductor and forming an insulation layer of the insulation material between the conductor and the bond pad.

Active Area Bonding Compatible High Current Structures

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US Patent:
8274160, Sep 25, 2012
Filed:
Jun 28, 2010
Appl. No.:
12/825030
Inventors:
John T. Gasner - Satellite Beach FL, US
Michael D. Church - Sebastian FL, US
Sameer D. Parab - Fremont CA, US
David A. Decrosta - Melbourne FL, US
Robert Lomenick - Palm Bay FL, US
Chris A. McCarty - Melbourne FL, US
Assignee:
Intersil Americas Inc. - Milpitas CA
International Classification:
H01L 23/52
H01L 29/40
H01L 21/44
US Classification:
257779, 257E23019, 257E2302, 257E2159, 438614, 438618, 438622
Abstract:
A method of forming a semiconductor structure is provided. One method comprises forming a device region between a substrate and a bond pad. Patterning a conductor between the bond pad and the device region with gaps. Filling the gaps with insulation material that is harder than the conductor to form pillars of relatively hard material that extend through the conductor and forming an insulation layer of the insulation material between the conductor and the bond pad.

Active Area Bonding Compatible High Current Structures

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US Patent:
8569896, Oct 29, 2013
Filed:
Jun 26, 2012
Appl. No.:
13/532843
Inventors:
John T. Gasner - Satellite Beach FL, US
Michael D. Church - Canyon Lake FL, US
Sameer D. Parab - Fremont CA, US
David A. Decrosta - Melbourne FL, US
Robert Lomenick - Palm Bay FL, US
Chris A. McCarty - Melbourne FL, US
Assignee:
Intersil Americas Inc. - Milpitas CA
International Classification:
H01L 23/48
H01L 21/44
US Classification:
257779, 257780, 257786, 438612, 438614
Abstract:
A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.

Active Area Bonding Compatible High Current Structures

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US Patent:
20050042853, Feb 24, 2005
Filed:
Oct 31, 2003
Appl. No.:
10/698184
Inventors:
John Gasner - Satellite Beach FL, US
Michael Church - Sebastian FL, US
Sameer Parab - Fremont CA, US
Paul Bakeman - Shelburne VT, US
David Decrosta - Melbourne FL, US
Robert Lomenick - Palm Bay FL, US
Chris McCarty - Melbourne FL, US
International Classification:
H01L021/44
US Classification:
438612000
Abstract:
An integrated circuit with circuits under a bond pad. In one embodiment, the integrated circuit comprises a substrate, a top conductive layer, one or more intermediate conductive layers, layers of insulating material and devices. The top conductive layer has a at least one bonding pad and a sub-layer of relatively stiff material. The one or more intermediate conductive layers are formed between the top conductive layer and the substrate. The layers of insulating material separate the conductive layers. Moreover, one layer of the layers of insulating material is relatively hard and is located between the top conductive layer and an intermediate conductive layer closest to the top conductive layer. The devices are formed in the integrated circuit. In addition, at least the intermediate conductive layer closest to the top conductive layer is adapted for functional interconnections of select devices under the bond pad.

Active Area Bonding Compatible High Current Structures

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US Patent:
20060099823, May 11, 2006
Filed:
Dec 19, 2005
Appl. No.:
11/305987
Inventors:
John Gasner - Satellite Beach FL, US
Michael Church - Sebastian FL, US
Sameer Parab - Fremont CA, US
Paul Bakeman - Shelburne VT, US
David Decrosta - Melbourne FL, US
Robert Lomenick - Palm Bay FL, US
Chris McCarty - Melbourne FL, US
Assignee:
Intersil Americas Inc. - Milpitas CA
International Classification:
H01L 21/31
US Classification:
438758000, 438782000
Abstract:
An integrated circuit with circuits under a bond pad. In one embodiment, the integrated circuit comprises a substrate, a top conductive layer, one or more intermediate conductive layers, layers of insulating material and devices. The top conductive layer has a at least one bonding pad and a sub-layer of relatively stiff material. The one or more intermediate conductive layers are formed between the top conductive layer and the substrate. The layers of insulating material separate the conductive layers. Moreover, one layer of the layers of insulating material is relatively hard and is located between the top conductive layer and an intermediate conductive layer closest to the top conductive layer. The devices are formed in the integrated circuit. In addition, at least the intermediate conductive layer closest to the top conductive layer is adapted for functional interconnections of select devices under the bond pad.

Active Area Bonding Compatible High Current Structures

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US Patent:
20070187837, Aug 16, 2007
Filed:
Apr 19, 2007
Appl. No.:
11/737395
Inventors:
John Gasner - Satellite Beach FL, US
Michael Church - Sebastian FL, US
Sameer Parab - Fremont CA, US
Paul Bakeman - South Burlington VT, US
David Decrosta - Melbourne FL, US
Robert Lomenick - Palm Bay FL, US
Chris McCarty - Melbourne FL, US
Assignee:
INTERSIL AMERICAS INC. - Milpitas CA
International Classification:
H01L 23/48
H01L 23/52
US Classification:
257780000, 257786000, 257E23020
Abstract:
A semiconductor structure is provided. In one embodiment, the structure comprises at least one active device located in a substrate and directly under a bond pad. A conductor is located between the bond pad and the substrate. The conductor has a plurality of gaps filled with insulating material. The insulating material is harder than the conductor.

Active Area Bonding Compatible High Current Structures

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US Patent:
20130130445, May 23, 2013
Filed:
Dec 18, 2012
Appl. No.:
13/717942
Inventors:
Michael D. Church - Canyon Lake FL, US
Sameer D. Parab - Redwood City CA, US
David A. Decrosta - Melbourne FL, US
Robert Lomenick - Palm Bay FL, US
Chris A. McCarty - Melbourne FL, US
Assignee:
INTERSIL AMERICAS INC. - Milpitas MN
International Classification:
H01L 23/00
US Classification:
438121, 438612
Abstract:
A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.

Active Area Bonding Compatible High Current Structures

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US Patent:
20140113444, Apr 24, 2014
Filed:
Dec 31, 2013
Appl. No.:
14/145218
Inventors:
- Milpitas CA, US
Michael D. Church - Canyon Lake FL, US
Sameer D. Parab - Redwood City CA, US
David A. Decrosta - Melbourne FL, US
Robert Lomenick - Palm Bay FL, US
Chris A. McCarty - Melbourne FL, US
Assignee:
INTERSIL AMERICAS INC. - Milpitas CA
International Classification:
H01L 21/768
US Classification:
438612
Abstract:
A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.
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Robert Lee Lomenick from Colorado Springs, CO, age ~67 Get Report