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Ming-Yih Kao

from Dallas, TX
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Related to:
Wen Chieng Kao, 66Mingyih Kao, 69Johntan M KaoJonathan M Kao, 37David M Kao, 35Wai Jung Kao, 67Yinlung Kao, 67
Connected to:
Andrew Kao, 48Chong S Kao, 65Dara Kao, 37Emmy T Kao, 75Evan I Kao, 40Hua H Kao, 47Ikuko Kao, 52Ivy L Kao, 70Jamie Kao, 62Jeffery Kao, 40

Ming-Yih Kao Phones & Addresses

  • Dallas, TX

Work

Company: Qorvo, inc. Jan 2015 Position: Engineering fellow at qorvo, inc

Education

Degree: Doctorates, Doctor of Philosophy School / High School: The University of Texas at Dallas Specialities: Electronics, Electronics Engineering, Philosophy

Skills

Semiconductor Device • Semiconductor Process • Compound Semiconductors • Microwave Engineering • Mmic • Device Characterization • Engineering Management

Industries

Semiconductors

Resumes

Resumes

Ming-Yih Kao Photo 1

Engineering Fellow At Qorvo, Inc

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Location:
Dallas, TX
Industry:
Semiconductors
Work:
Qorvo, Inc.
Engineering Fellow at Qorvo, Inc
Triquint Semiconductor Jan 1998 - Dec 2014
Triquint Fellow
Texas Instruments 1995 - 1997
Technical Staff of Central Research Lab
Lockheed Martin 1992 - 1995
Senior Development Engineer
Ge 1987 - 1992
Senior Engineer
Education:
The University of Texas at Dallas
Doctorates, Doctor of Philosophy, Electronics, Electronics Engineering, Philosophy University of Massachusetts Amherst
Masters, Master of Engineering, Engineering, Electronics Engineering, Electronics National Tsing Hua University
Bachelors, Bachelor of Science, Physics
Skills:
Semiconductor Device
Semiconductor Process
Compound Semiconductors
Microwave Engineering
Mmic
Device Characterization
Engineering Management

Publications

Us Patents

Long Wavelength Laser Diodes On Metamorphic Buffer Modified Gallium Arsenide Wafers

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US Patent:
6697412, Feb 24, 2004
Filed:
Apr 13, 2001
Appl. No.:
09/834832
Inventors:
Gary A. Evans - Plano TX
Paul Saunier - Addison TX
Ming-Yih Kao - Dallas TX
David M. Fanning - Garland TX
William H. Davenport - Hillsboro OR
Andy Turudic - Hillsboro OR
Walter A. Wohlmuth - Hillsboro OR
Assignee:
TriQuint Semiconductor, Inc. - Hillsboro OR
International Classification:
H01S 5183
US Classification:
372 96, 257190, 372 45
Abstract:
A light-emitting device includes a GaAs substrate, a light-emitting structure disposed above the substrate and capable of emitting light having a wavelength of about 1. 3 microns to about 1. 55 microns, and a buffer layer disposed between the substrate and the light-emitting structure. The composition of the buffer layer varies through the buffer layer such that a lattice constant of the buffer layer grades from a lattice constant approximately equal to a lattice constant of the substrate to a lattice constant approximately equal to a lattice constant of the light-emitting structure. The light-emitting device exhibits improved mechanical, electrical, thermal, and optical properties compared to similar light-emitting devices grown on InP substrates.

Heterostructure Field Effect Transistor

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US Patent:
6787826, Sep 7, 2004
Filed:
Mar 14, 2003
Appl. No.:
10/390261
Inventors:
Hua Quen Tserng - Dallas TX
Ming-Yih Kao - Dallas TX
Assignee:
TriQuint Semiconductor, Inc. - Hillsboro OR
International Classification:
H01L 29812
US Classification:
257280, 257283, 257284, 438570, 438572
Abstract:
A high electron mobility transistor is constructed with a substrate, a lattice-matching buffer layer formed on the substrate, and a heavily doped p-type barrier layer formed on the buffer layer. A spacer layer is formed on the barrier layer, and a channel layer is formed on the spacer layer. The channel layer may be of uniform composition, or may be made from two or more sublayers. A Schottky layer is formed over the channel layer, and source and drain contacts are formed on the Schottky layer. The substrate may be gallium arsenide, indium phosphide, or other suitable material, and the various semiconductor layers formed over the substrate contain indium. The transistors transition frequency of the transistor is above 200 GHz.

Multi-Layer Structure For Use In The Fabrication Of Integrated Circuit Devices And Methods For Fabrication Of Same

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US Patent:
7321132, Jan 22, 2008
Filed:
Mar 15, 2005
Appl. No.:
11/080293
Inventors:
Kevin L. Robinson - Clay NY, US
Larry Witkowski - Plano TX, US
Ming-Yih Kao - Dallas TX, US
Assignee:
Lockheed Martin Corporation - Bethesda MD
International Classification:
H01L 29/06
H01L 29/201
H01L 29/732
H01L 21/338
US Classification:
257 12, 257 90, 257 94, 257183, 438167, 438172, 438186, 438191
Abstract:
A multi-layer structure for use in the fabrication of integrated circuit devices is adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors. The structure has, on a substrate, a channel layer, spacer layer on the channel layer, a first Schottky layer, a second Schottky layer on the first Schottky layer, and a third Schottky layer on the second Schottky layer, and a contact layer on the third Schottky layer. Etch stops are defined intermediate the first and second Schottky layers, intermediate the second and third Schottky layers, and intermediate the third Schottky layer and the contact layer.

Method For Fabrication Of Devices In A Multi-Layer Structure

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US Patent:
7541232, Jun 2, 2009
Filed:
Nov 28, 2007
Appl. No.:
11/998072
Inventors:
Kevin L. Robinson - Clay NY, US
Larry Witkowski - Plano TX, US
Ming-Yih Kao - Dallas TX, US
Assignee:
Lockheed Martin Corporation - Bethesda MD
International Classification:
H01L 21/338
H01L 21/461
US Classification:
438172, 438167, 438169, 438191, 438738, 438740, 257191, 257E21403, 257E21407
Abstract:
A method for fabricating devices in a multi-layer structure adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors includes defining gate recesses in the structure. The structure has, on a substrate, a channel layer, spacer layer on the channel layer, a first Schottky layer, a second Schottky layer on the first Schottky layer, and a third Schottky layer on the second Schottky layer, and a contact layer on the third Schottky layer. Etch stops are defined intermediate the first and second Schottky layers, intermediate the second and third Schottky layers, and intermediate the third Schottky layer and the contact layer.

Recessed Etch Rf Micro-Electro-Mechanical Switch

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US Patent:
61004774, Aug 8, 2000
Filed:
Jul 17, 1998
Appl. No.:
9/118109
Inventors:
John Neal Randall - Overijse, BE
Ming-Yih Kao - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01H 5700
US Classification:
200181
Abstract:
A novel micro-electro-mechanical (MEMS) RF switch having a cavity (32) in a substrate (28) which creates a spacing between a conductive membrane (34) and a bottom electrode (38). The invention eliminates the need for the dielectric posts found in prior art MEMS RF switches, includes a flexure structure (36) in the membrane (34) which will reduce the required pull down voltage for the membrane, and reduces the stress and fatigue in the membrane due to switch activation.
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Ming-Yih Kao from Dallas, TX Get Report