Search

Michael Sugino Phones & Addresses

  • Mesa, AZ
  • 1512 N 88Th Pl, Mesa, AZ 85207

Work

Position: Medical Professional

Publications

Us Patents

System And Method Of Implementing Contacts Of Small Worlds In Packet Communication Networks

View page
US Patent:
7616632, Nov 10, 2009
Filed:
Jul 15, 2004
Appl. No.:
10/891872
Inventors:
Michael Sugino - Mesa AZ, US
International Classification:
H04L 12/28
US Classification:
370389, 370252, 370401, 370408
Abstract:
A small world infrastructure (SWI) of a general packet communications network and a method of determining, establishing and maintaining a hierarchical forwarding path (HFP) interconnecting communications units (CUs) of the small world infrastructure. The SWI includes a domain that has a given communication unit CU as a message packet source, a plurality of associated communications units each in direct contact with the given CU, and a plurality of HFPs each providing the direct contact between the given CU and one of the associated CUs, respectively. The method includes providing these communications units in which there are HFPs between first and second CUs and between the second and the third CUs, and a third HFP is constructed between the first and the third CUs.

System And Method Of Utilizing Virtual Ants In Small World Infrastructure Communication Networks

View page
US Patent:
20050083858, Apr 21, 2005
Filed:
Oct 7, 2004
Appl. No.:
10/960882
Inventors:
Michael Sugino - Mesa AZ, US
International Classification:
H04L012/28
US Classification:
370254000, 370397000, 370399000, 706014000
Abstract:
A small world infrastructure network of communication units, a plurality of which are stigmergic-capable nodes that are capable of generating and supporting virtual ants. A virtual ant can carry information relating to a node, such as its identification and sequence information, and can be sent by the node to one or more neighboring nodes to establish, recursively, hierarchical forwarding paths. A virtual ant interacts with a node through alteration of the table entries of the destination node receiving the virtual ant.

Method Of Making Self-Aligned Device

View page
US Patent:
43193951, Mar 16, 1982
Filed:
Jun 28, 1979
Appl. No.:
6/053132
Inventors:
Clarence A. Lund - Mesa AZ
Edward W. Barron - Mesa AZ
Howard E. Holstin - Tempe AZ
Michael D. Sugino - Scottsdale AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 21306
H01L 21441
US Classification:
29571
Abstract:
A self-aligned MOS transistor having improved operating characteristics and higher packing density and a method for fabricating the device. Resistance of the gate electrode is reduced substantially by forming the electrode of a metal silicide. Resistance of the source and drain regions is likewise reduced substantially by forming a metal silicide in the doped junction region which allows those regions to be smaller and to require less area. The silicided source and drain regions are self-aligned with and closely spaced to the silicided gate electrode. This is provided by a process which utilizes and makes possible an undercut etching of a polycrystalline silicon gate electrode.

Low Resistance Buried Power Bus For Integrated Circuits

View page
US Patent:
45034516, Mar 5, 1985
Filed:
Jul 30, 1982
Appl. No.:
6/404264
Inventors:
Clarence A. Lund - Phoenix AZ
Michael D. Sugino - Mesa AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 2352
H01L 2704
US Classification:
357 50
Abstract:
In a channel formed in one surface of a semiconductor substrate having a first conductivity, e. g. N type, a layer of material having a second conductivity type, e. g. P type boron, and a layer of relatively low resistance material such as Tungsten in contact with the first layer but insulated from the substrate. Second conductivity type tubs and the like can be formed adjacent the bus and in direct contact therewith through the first layer.

Radiation Hard Mos Devices And Methods For The Manufacture Thereof

View page
US Patent:
45918902, May 27, 1986
Filed:
Dec 20, 1982
Appl. No.:
6/450869
Inventors:
Clarence A. Lund - Phoenix AZ
Michael D. Sugino - Mesa AZ
Assignee:
Motorola Inc. - Schaumburg IL
International Classification:
H01L 2978
US Classification:
357 2311
Abstract:
Radiation hard, N-channel MOS devices comprising active regions surrounded by field oxide protected by an underlying region of heavily doped p-type material. The guard region is doped heavily enough to provide field inversion voltages in the range of 50 V to 60 V prior to irradiation. The guard region is separated from the source and drain regions to provide acceptably high breakdown voltages. The devices are produced with minor variations to well known, high density local oxidation of silicon-type processes.
Michael D Sugino from Mesa, AZ Get Report