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Kiran R Desai

from Pleasanton, CA
Age ~58
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Also known as:
Kiran Deai, Kiran Desan
Phone and address:
2770 Glen Isle Ct, Pleasanton, CA 94588
(925) 600-0118
Related to:
Anna Desai, 54Rajani J Desai, 52Chittaranjan Desai
Connected to:
Aadip K Desai, 48Aashay K Desai, 40Abhi M Desai, 32Adi J Desai, 94Akash R Desai, 47Aken A Desai, 39Amanda R Desai, 43Amir Desai, 35Ani V Desai, 31Anjan A Desai, 64

Kiran Desai Phones & Addresses

  • 2770 Glen Isle Ct, Pleasanton, CA 94588 (925) 600-0118
  • 20800 Homestead Rd, Cupertino, CA 95014 (408) 252-8835
  • 20800 Homestead Rd #37F, Cupertino, CA 95014 (408) 646-2421
  • 620 Iris Ave, Sunnyvale, CA 94086 (408) 732-9024 (408) 749-1793 (408) 746-9367
  • 620 Iris Ave #242, Sunnyvale, CA 94086 (408) 746-9367
  • 3900 Parkview Ln, Irvine, CA 92612
  • Alameda, CA
  • San Jose, CA
  • Binghamton, NY
  • Benicia, CA

Work

Company: Mayer Brown International LLP Address:

Specialities

Chemicals • Corporate & Securities • Financial Institutions M&A • Energy • Sectors • Power • Renewable Energy • Services • Energy Regulation and Government Affairs • India • International Trade • Life Sciences • Litigation & Dispute Resolution • Antitrust & Competition • Health Care Litigation • Pro Bono

Professional Records

Lawyers & Attorneys

Kiran Desai Photo 1

Kiran Desai - Lawyer

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Office:
Mayer Brown International LLP
Specialties:
Chemicals
Corporate & Securities
Financial Institutions M&A
Energy
Sectors
Power
Renewable Energy
Services
Energy Regulation and Government Affairs
India
International Trade
Life Sciences
Litigation & Dispute Resolution
Antitrust & Competition
Health Care Litigation
Pro Bono
ISLN:
912454335
Admitted:
1989
University:
Keele University, 1987; Keele University, 1987; Keele University, 1987; Keele University, 1987

Business Records

Name / Title
Company / Classification
Phones & Addresses
Kiran Desai
Owner
Vip Appraisals
Business Services · Real Estate Agent/Manager
17227 Leal Ave, Artesia, CA 90703

Publications

Isbn (Books And Publications)

Hullabaloo in the Guava Orchard

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Author

Kiran Desai

ISBN #

0385493703

The Inheritance of Loss

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Author

Kiran Desai

ISBN #

0802142818

Hullabaloo in the Guava Orchard

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Author

Kiran Desai

ISBN #

0871137119

The Inheritance of Loss

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Author

Kiran Desai

ISBN #

0871139294

Wikipedia References

Kiran Desai Photo 2

Kiran Desai

Us Patents

Cache Organization With An Adjustable Number Of Ways

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US Patent:
8364897, Jan 29, 2013
Filed:
Sep 29, 2004
Appl. No.:
10/954375
Inventors:
Kiran R. Desai - Cupertino CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/00
US Classification:
711128, 711E12017
Abstract:
A method and apparatus for an adjustable number of ways within a cache is herein described. A cache may comprise a plurality of lines addressably organized as a plurality of ways, wherein the plurality of ways may be addressably organized as groups. The cache may also have associated cache control logic to map a memory address to at least one way within each group based on a predetermined number of bits in the memory address.

K-Way Direct Mapped Cache

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US Patent:
7996619, Aug 9, 2011
Filed:
Apr 22, 2004
Appl. No.:
10/831488
Inventors:
Kiran R. Desai - Cupertino CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/00
US Classification:
711128, 711 3, 365 491
Abstract:
A method and apparatus for a k-way direct mapped cache organization is herein described. Control logic coupled to a cache may associate an address to a way within a plurality based on a first portion of the address. The control logic may match the first portion of the address to a predefined value in a mapping table, wherein the predefined value in the mapping table is associated with the way. In addition, the control logic may map the address to a set within cache based on a second portion of the address.

Methods And Apparatus For Maintaining Cache Coherency

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US Patent:
20050027945, Feb 3, 2005
Filed:
Jul 30, 2003
Appl. No.:
10/630164
Inventors:
Kiran Desai - Cupertino CA, US
International Classification:
G06F012/00
US Classification:
711145000, 711144000, 711122000, 711133000, 711146000
Abstract:
Methods and apparatus for maintaining cache coherency and reducing write-back traffic by using an enhanced MESI cache coherency protocol are disclosed. The enhanced MESI protocol includes the traditional MESI cache states (i.e., modified, exclusive, shared, invalid, and pending) as well as two additional cache states (i.e., enhanced modified and enhanced exclusive). An enhanced modified cache line is a cache line that is different than main memory and a copy of the cache line may be in another cache. An enhanced exclusive cache line is a cache line that is not modified and a copy of the cache line is in another cache in a modified state. Depending on the state of a victimized cache line, an internal inquiry may be issued to other caches and/or a write-back operation may be performed prior to victimizing the selected cache line.

Methods And Apparatus For Filtering A Cache Snoop

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US Patent:
20050027946, Feb 3, 2005
Filed:
Jul 30, 2003
Appl. No.:
10/630465
Inventors:
Kiran Desai - Cupertino CA, US
International Classification:
G06F012/00
US Classification:
711146000, 711144000, 711145000, 711122000, 711133000
Abstract:
Methods and apparatus for maintaining cache coherency and reducing write-back traffic by using an enhanced MESI cache coherency protocol are disclosed. The enhanced MESI protocol includes the traditional MESI cache states (i.e., modified, exclusive, shared, invalid, and pending) as well as two additional cache states (i.e., enhanced modified and enhanced exclusive). An enhanced modified cache line is a cache line that is different than main memory and a copy of the cache line may be in another cache. An enhanced exclusive cache line is a cache line that is not modified and a copy of the cache line is in another cache in a modified state. Depending on the state of a victimized cache line, an internal inquiry may be issued to other caches and/or a write-back operation may be performed prior to victimizing selected cache line. Snoop probes are filtered to reduce bus traffic.

Method And Apparatus For Correcting Errors In A Cache Array

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US Patent:
20060031708, Feb 9, 2006
Filed:
Aug 4, 2004
Appl. No.:
10/910337
Inventors:
Kiran Desai - Cupertino CA, US
International Classification:
G06F 11/00
G06F 12/00
US Classification:
714005000, 711122000, 711146000
Abstract:
A system and method is provided for correcting errors in a cache array. Embodiments may include a lower level cache tag array to store a plurality of lower level tags to identify a location in a lower level cache of a requested data, an error detection element to detect that one of the lower level tags stored in the lower level tag array has an error, an upper level cache tag array to store a plurality of upper level tags to identify a location in an upper level cache of the requested data if the lower level tags do not identify a location of the requested data in the lower level cache, and an error handler to derive a correct value for the stored lower level tag that has an error from one of the upper level tags stored in the upper level tag array.

Horizontal Scaling For A Software Defined Wide Area Network (Sd-Wan)

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US Patent:
20220329659, Oct 13, 2022
Filed:
Jul 29, 2021
Appl. No.:
17/389008
Inventors:
- San Jose CA, US
Kiran Desai - Santa Clara CA, US
Jun Shang - Tokyo, JP
Venkata Suresh Kalluri - Fremont CA, US
International Classification:
H04L 29/08
H04L 29/06
H04L 12/24
H04L 29/12
Abstract:
Disclosed are systems, apparatuses, methods, and computer-readable media for managing networks. According to at least one example, a method is provided for connecting to a network controller across different regions. The method includes identifying a first connection with a network orchestrator during establishment of a second connection with the network orchestrator from a network controller; establishing a sibling session that links the second connection and the first connection at a control plane; inserting a sibling data message that identifies the sibling session into control messages sent; receiving a message from the network orchestrator over the second connection, the message including an address of the network controller associated with the second connection; and transmitting the second address of the network controller over the first connection to the network orchestrator.
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Kiran R Desai from Pleasanton, CA, age ~58 Get Report