Zhen Fu Zhang

7529740, May 5, 2009

Aug 14, 2006

11/503713

Yuan-chi Chang - Bayside NY, US
Lipyeow Lim - North White Plains NY, US
Min Wang - Cortlandt Manor NY, US
Zhen Zhang - Champaign IL, US

International Business Machines Corporation - Armonk NY

G06F 17/30

707 3, 707200, 707204, 707205

A method for organizing deep Web services is provided. In one aspect, the method obtains a collection of sources and their associated attributes and/or input modes, for instance, using a crawling algorithm. The method uses this information to organize the sources into communities. A mining algorithm such as the hyperclique mining algorithm is used to obtain cliques of highly correlated attributes. A clustering algorithm such as the hierarchical agglomerative clustering algorithm is used to further cluster the cliques of attributes into larger cliques, which in the present disclosure is referred to as signatures. The sources that are associated with each signature form a community and a graph representation of the communities is constructed, where the vertices are communities and the edges are the shared attributes.

7533085, May 12, 2009

Aug 14, 2006

11/503754

Yuan-chi Chang - Bayside NY, US
Lipyeow Lim - North White Plains NY, US
Min Wang - Cortlandt Manor NY, US
Zhen Zhang - Champaign IL, US

International Business Machines Corporation - Armonk NY

G06F 17/30

707 3

A method for searching deep web services is provided. The method in one aspect allows organizing communities, sources and schema attributes in a multi-tier containment relationship; searching representative schema attributes in one or more communities; searching representative services in one or more communities; searching for related schema attributes; and searching for related communities.

8030154, Oct 4, 2011

Aug 3, 2010

12/849223

Ahmet S. Ozcan - Pleasantville NY, US
Christian Lavoie - Ossining NY, US
Zhen Zhang - Ossining NY, US
Bin Yang - Ossining NY, US

International Business Machines Corporation - Armonk NY
GLOBALFOUNDRIES, Inc. - Grand Cayman

H01L 21/8238

438230, 438199, 438581, 438696

In one embodiment, a method of forming a semiconductor device is provided that includes providing a gate structure on a semiconductor substrate. Sidewall spacers may be formed adjacent to the gate structure. A metal semiconductor alloy may be formed on the upper surface of the gate structure and on an exposed surface of the semiconductor substrate that is adjacent to the gate structure. An upper surface of the metal semiconductor alloy is converted to an oxygen-containing protective layer. The sidewall spacers are removed using an etch that is selective to the oxygen-containing protective layer. A strain-inducing layer is formed over the gate structure and the semiconductor surface, in which at least a portion of the strain-inducing layer is in direct contact with the sidewall surface of the gate structure. In another embodiment, the oxygen-containing protective layer of the metal semiconductor alloy is provided by a two stage annealing process.

8168503, May 1, 2012

Mar 18, 2010

12/726736

Marwan H. Khater - Astoria NY, US
Christian Lavoie - Ossining NY, US
Bin Yang - Ossining NY, US
Zhen Zhang - Ossining NY, US

International Business Machines Corporation - Armonk NY

H01L 21/336

438300, 438285

A method of fabricating a Schottky field effect transistor is provided that includes providing a substrate having at least a first semiconductor layer overlying a dielectric layer, wherein the first semiconductor layer has a thickness of less than 10. 0 nm. A gate structure is formed directly on the first semiconductor layer. A raised semiconductor material is selectively formed on the first semiconductor layer adjacent to the gate structure. The raised semiconductor material is converted into Schottky source and drain regions composed of a metal semiconductor alloy. A non-reacted semiconductor material is present between the Schottky source and drain regions and the dielectric layer.

8247319, Aug 21, 2012

Feb 7, 2011

13/022474

Benjamin Luke Fletcher - Elmsford NY, US
Christian Lavoie - Pleasantville NY, US
Siegfried Lutz Maurer - Stormville NY, US
Zhen Zhang - Ossining NY, US

International Business Machines Corporation - Armonk NY

H01L 21/28
H01L 21/44

438581, 438583, 438664, 438682, 257E21164, 257E21165, 977890, 977900

Techniques for silicide, germanide or germanosilicide formation in extremely small structures are provided. In one aspect, a method for forming a silicide, germanide or germanosilicide in a three-dimensional silicon, germanium or silicon germanium structure having extremely small dimensions is provided. The method includes the following steps. At least one element is implanted into the structure. At least one metal is deposited onto the structure. The structure is annealed to intersperse the metal within the silicon, germanium or silicon germanium to form the silicide, germanide or germanosilicide wherein the implanted element serves to prevent morphological degradation of the silicide, germanide or germanosilicide. The implanted element can include at least one of carbon, fluorine and silicon.

8278200, Oct 2, 2012

Jan 24, 2011

13/012043

Christian Lavoie - Pleasantville NY, US
Tak H. Ning - Yorktown Heights NY, US
Ahmet S. Ozcan - Pleasantville NY, US
Bin Yang - Ossining NY, US
Zhen Zhang - Ossining NY, US

International Business Machines Corpration - Armonk NY
Globalfoudries Inc. - Grand Cayman

H01L 21/20

438584, 438597, 438660, 438664, 257E21091, 427 69, 427 78

In one exemplary embodiment, a program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine for performing operations, said operations including: depositing a first layer having a first metal on a surface of a semiconductor structure, where depositing the first layer creates a first intermix region at an interface of the first layer and the semiconductor structure; removing a portion of the deposited first layer to expose the first intermix region; depositing a second layer having a second metal on the first intermix region, where depositing the second layer creates a second intermix region at an interface of the second layer and the first intermix region; removing a portion of the deposited second layer to expose the second intermix region; and performing at least one anneal on the semiconductor structure.

8415748, Apr 9, 2013

Apr 23, 2010

12/766468

Marwan H. Khater - Astoria NY, US
Christian Lavoie - Ossining NY, US
Bin Yang - Ossining NY, US
Zhen Zhang - Ossining NY, US

International Business Machines Corporation - Armonk NY

H01L 21/02
H01L 31/07
H01L 29/47

257384, 257382, 257486, 257E21296, 257E29271

An epitaxial Ni silicide film that is substantially non-agglomerated at high temperatures, and a method for forming the epitaxial Ni silicide film, is provided. The Ni silicide film of the present disclosure is especially useful in the formation of ETSOI (extremely thin silicon-on-insulator) Schottky junction source/drain FETs. The resulting epitaxial Ni silicide film exhibits improved thermal stability and does not agglomerate at high temperatures.

8456011, Jun 4, 2013

Jan 14, 2011

13/006664

Christian Lavoie - Ossining NY, US
Ahmet S. Ozcan - Pleasantville NY, US
Zhen Zhang - Ossining NY, US
Bin Yang - Ossining NY, US

International Business Machines Corporation - Armonk NY
Globalfoundries Inc. - Grand Cayman

H01L 23/532

257769, 257739, 257736, 257770, 257E23157, 257E21582

A method of forming a metal semiconductor alloy that includes forming an intermixed metal semiconductor region to a first depth of a semiconductor substrate without thermal diffusion. The intermixed metal semiconductor region is annealed to form a textured metal semiconductor alloy. A second metal layer is formed on the textured metal semiconductor alloy. The second metal layer on the textured metal semiconductor alloy is then annealed to form a metal semiconductor alloy contact, in which metal elements from the second metal layer are diffused through the textured metal semiconductor alloy to provide a templated metal semiconductor alloy. The templated metal semiconductor alloy includes a grain size that is greater than 2× for the metal semiconductor alloy, which has a thickness ranging from 15 nm to 50 nm.