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Ze Zhang Phones & Addresses

  • Austin, TX
  • Essex Junction, VT
  • 9612 W Belfast Dr, Littleton, CO 80127
  • Lakewood, CO
  • Mishawaka, IN
  • Notre Dame, IN
  • Golden, CO

Publications

Us Patents

Generating An Electromagnetic Parameterized Cell For An Integrated Circuit Design

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US Patent:
20160125115, May 5, 2016
Filed:
Nov 5, 2014
Appl. No.:
14/533148
Inventors:
- Armonk NY, US
Hung H. Tran - Hopewell Junction NY, US
Ze Zhang - Essex Junction VT, US
International Classification:
G06F 17/50
Abstract:
An electromagnetic parameterized cell (EM Pcell) is generated for a local environment of an integrated circuit (IC) design for an electronic design flow. A set of parasitics extracted netlists is developed from a set of Pcell layouts and an external EM environment. The parasitics extracted netlists are simulated to provide a set of performance metrics. When a symbolic view of the EM Pcell is displayed to a designer during a subsequent schematic phase of the design flow, the performance metrics are accessed from a design library, to increase accuracy of parameter value selection for the EM Pcell without a parasitics extraction of the physical layout and generation of a parasitics extracted netlist.

Tunnel Field-Effect Transistors With A Gate-Swing Broken-Gap Heterostructure

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US Patent:
20150084091, Mar 26, 2015
Filed:
Nov 26, 2014
Appl. No.:
14/554766
Inventors:
- Armonk NY, US
Hoang H. Tran - Hopewell Junction NY, US
Ze Zhang - Essex Junction VT, US
International Classification:
H01L 27/088
H01L 29/78
H01L 29/08
H01L 29/205
G06F 17/50
H01L 29/66
US Classification:
257105, 716102
Abstract:
Device structures, fabrication methods, and design structures for tunnel field-effect transistors. A drain comprised of a first semiconductor material having a first band gap and a source comprised of a second semiconductor material having a second band gap are formed. A tunnel barrier is formed between the source and the drain. The second semiconductor material exhibits a broken-gap energy band alignment with the first semiconductor material. The tunnel barrier is comprised of a third semiconductor material with a third band gap larger than the first band gap and larger than the second band gap. The third band gap is configured to bend under an external bias to assist in aligning a first energy band of the first semiconductor material with a second energy band of the second semiconductor material

Tunnel Field-Effect Transistors With A Gate-Swing Broken-Gap Heterostructure

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US Patent:
20150014633, Jan 15, 2015
Filed:
Jul 9, 2013
Appl. No.:
13/937622
Inventors:
- Armonk NY, US
Hung H. Tran - Hopewell Junction NY, US
Wayne H. Woods - Burlington VT, US
Ze Zhang - Essex Junction VT, US
International Classification:
H01L 29/08
H01L 29/786
H01L 29/66
US Classification:
257 39, 438197
Abstract:
Device structures, fabrication methods, and design structures for tunnel field-effect transistors. A drain comprised of a first semiconductor material having a first band gap and a source comprised of a second semiconductor material having a second band gap are formed. A tunnel barrier is formed between the source and the drain. The second semiconductor material exhibits a broken-gap energy band alignment with the first semiconductor material. The tunnel barrier is comprised of a third semiconductor material with a third band gap larger than the first band gap and larger than the second band gap. The third band gap is configured to bend under an external bias to assist in aligning a first energy band of the first semiconductor material with a second energy band of the second semiconductor material

Thermoresistance Sensor Structure For Integrated Circuits And Method Of Making

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US Patent:
20140376595, Dec 25, 2014
Filed:
Jun 19, 2013
Appl. No.:
13/921988
Inventors:
- Armonk NY, US
Hung H. Tran - Hopewell Junction NY, US
Ze Zhang - Essex Junction VT, US
International Classification:
G01K 7/16
H01L 23/34
H01L 23/528
H01L 49/02
H01L 29/06
US Classification:
374185, 438382
Abstract:
A first pair of resistors formed in a first layer of material, and a second pair of resistors formed in the first layer or in a second layer can be wired into a Wheatstone bridge to form a temperature sensor. Either layer can include a semiconductor or a dielectric. In a semiconductor layer, a pair of resistors can be doped areas of the layer, while in a dielectric, a pair of resistors can be material deposited in cavities in the layer, such as material from an added “middle-of-line” (MOL) metallization layer.

Thermally-Optimized Metal Fill For Stacked Chip Systems

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US Patent:
20140246757, Sep 4, 2014
Filed:
Mar 1, 2013
Appl. No.:
13/782561
Inventors:
- Armonk NY, US
Wolfgang Sauter - Hinesburg VT, US
Hung H. Tran - East Fishkill NY, US
Wayne H. Woods - Burlington VT, US
Ze Zhang - Essex Junction VT, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 17/50
H01L 23/522
US Classification:
257621, 716130
Abstract:
Stacked chip systems and design structures for stacked chip systems, as well as methods and computer program products for placing thermal conduction paths in a stacked chip system. The method may include determining an availability of space in a layout of an interconnect structure of a first chip for a fill shape structure extending partially through the interconnect structure to thermally couple a metal feature in the interconnect structure with a bonding layer between the interconnect structure of the first chip and a second chip. If space is available, the fill shape structure may be placed in the layout of the interconnect structure of the first chip. The stacked chip system may include the first and second chips, the bonding layer between the interconnect structure of the first chip and the second chip, and the fill shape structure.

Wikipedia

Zhang Ze

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Jump to: navigation, search. This is a Chinese name; the family name is Zhang. Zhang Ze (Chinese: , born April 7, 1990) is a Chinese male tennis player. ...

Isbn (Books And Publications)

Handbook of Nanophase and Nanostructured Materials: Characterization

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Author

Ze Zhang

ISBN #

0306467380

Handbook of Nanophase and Nanostructured Materials: Materials Systems and Applications I

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Author

Ze Zhang

ISBN #

0306467399

Handbook of Nanophase and Nanostructured Materials: Materials Systems and Applications II

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Author

Ze Zhang

ISBN #

0306467402

Handbook of Nanophase and Nanostructured Materials: Synthesis

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Author

Ze Zhang

ISBN #

0306467372

Progress in Transmission Electron Microscopy 1: Concepts and Techniques

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Author

Ze Zhang

ISBN #

3540676805

Progress in Transmission Electron Microscopy 2: Applications in Materials Science

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Author

Ze Zhang

ISBN #

3540676813

Ze E Zhang from Austin, TX, age ~41 Get Report