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Xiang Yang Phones & Addresses

  • San Francisco, CA
  • New York, NY
  • West New York, NJ

Resumes

Resumes

Xiang Yang Photo 1

Nvm Device Integration And Yield Engineer

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Location:
Berkeley, CA
Industry:
Semiconductors
Work:
Intel Corporation
Nvm Device Integration and Yield Engineer

Sandisk
Technologist, R and D Engineering

Sandisk Jun 2017 - Mar 2019
Principle Device Engineer

Sandisk Jan 2017 - Jun 2017
Staff Device Engineer

Sandisk Feb 2015 - Dec 2016
Senior Device Engineer at Sandisk
Education:
University of Pennsylvania 2012 - 2014
Masters, Electrical Engineering
University of Pennsylvania 2009 - 2014
Doctorates, Doctor of Philosophy, Materials Science, Engineering, Philosophy
Uc San Diego 2008 - 2009
Master of Science, Masters, Physics
Tsinghua University 2004 - 2008
Bachelors, Physics
Uc San Diego
Masters
Skills:
Thin Films
Physics
Semiconductors
Materials Science
Afm
Nanotechnology
Lithography
Electron Microscopy
Cmos
Lab Design
Device Physics
Numerical Simulation
Semiconductor Device
Flash Memory
Programming
Thin Film Deposition
Vlsi
Semiconductor Fabrication
Cadence
Digital Signal Processing
Ic
Interests:
Science and Technology
Music
Bodybuilding
Tennis
Swimming
Driving
Xiang Yang Photo 2

Analyst

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Location:
New York, NY
Industry:
Information Technology And Services
Work:
Cervello
Analyst

Well Woven Sep 2018 - May 2019
Data Analyst Intern

Bureau of Statistics Sep 2016 - Dec 2016
Data Analysis Assistant

China Construction Bank (Asia) Corporation Limited Apr 2016 - Aug 2016
Data Analyst
Education:
Stevens Institute of Technology 2017 - 2019
Masters, Business
Skills:
Data Analytics
Sql
Python
Microsoft Excel
Tableau
Machine Learning

Business Records

Name / Title
Company / Classification
Phones & Addresses
Xiang Hui Yang
CEO
FENG SHENG CHINA BUFFET INC
136 Bowery STE 203, New York, NY 10013
Xiang Yang
GREAT WALL BUFFET
Xiang Lian Yang
President
D.Y. UNIVERSAL INC
180 El Camino Real STE 5, Millbrae, CA 94030
Xiang Keng Yang
Director, Vice President
HEREFORD GREAT WALL INC
32 E Broadway RM 401, New York, NY 10002
828 W 1 St, Summerfield, TX 79045

Publications

Us Patents

Non-Volatile Memory With Sub-Block Based Self-Boosting Scheme

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US Patent:
20230050955, Feb 16, 2023
Filed:
Aug 11, 2021
Appl. No.:
17/399498
Inventors:
- Addison TX, US
Gerrit Jan Hemink - San Ramon CA, US
Xiang Yang - Santa Clara CA, US
Ken Oowada - Fujisawa, JP
Guirong Liang - Santa Clara CA, US
Assignee:
SanDisk Technologies LLC - Addison TX
International Classification:
G11C 16/34
H01L 25/065
H01L 25/18
H01L 23/00
G11C 11/56
G11C 16/04
G11C 16/10
G11C 16/16
G11C 16/24
Abstract:
To help reduce program disturbs in non-selected NAND strings of a non-volatile memory, a sub-block based boosting scheme in introduced. For a three dimensional NAND memory structure, in which the memory cells above a joint region form an upper sub-block and memory cells below the joint region form a lower sub-block, dummy word lines in the joint region act as select gates to allow boosting at the sub-block level when the lower block is being programmed in a reverse order.
Xiang Yang from San Francisco, CA, age ~56 Get Report