US Patent:
20060265677, Nov 23, 2006
Inventors:
Louis Scheffer - Campbell CA, US
Wolfgang Staud - Redwood City CA, US
Judy Huckabay - Fremont CA, US
International Classification:
G06F 17/50
Abstract:
An improved method, system, and computer program product is disclosed for increased accuracy for extraction of electrical parameters of an IC design. Extraction is performed upon the expected geometric model of the printed layout once manufacturing and lithographic process effects are taken into consideration. This provides a much more accurate approach for performing extraction since it is the actual expected geometric shapes that are analyzed, rather than an idealized model of the layout that does not accurately correspond to the actual manufactured IC product. The extracted electrical parameters are checked for acceptability. If not acceptable, then the IC design can be modified to address any identified problems or desired improvements to the design.