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Wilson Olivia Wong

from San Jose, CA
Age ~72
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Also known as:
William Tang
Phone and address:
2579 Minuet Dr, San Jose, CA 95131
(408) 204-3597
Related to:
Duncan Malcom Wong, 57Kwokon Kong, 86
Connected to:
Abraham C Wong, 55Adele S Wong, 61Alan M Wong, 48Albert T Wong, 43Aldo Wong, 56Aldwin H Wong, 56Alen R Wong, 56Ali G Wong, 45Alia E Wong, 34Alifa Y Wong, 45

Wilson Wong Phones & Addresses

  • 2579 Minuet Dr, San Jose, CA 95131 (408) 204-3597
  • North Las Vegas, NV
  • Laveen, AZ
  • Las Vegas, NV
  • Anaheim, CA
  • Maricopa, AZ
  • Santa Clara, CA

Professional Records

Medicine Doctors

Wilson Wong Photo 1

Dr. Wilson S Wong, Arcadia CA - MD (Doctor of Medicine)

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Specialties:
Diagnostic Radiology
Address:
Arcadia Radiology Medical Group
612 W Duarte Rd Suite 101, Arcadia, CA 91007
(626) 445-4850 (Phone)
Certifications:
Diagnostic Radiology, 1982
Awards:
Healthgrades Honor Roll
Languages:
English
Chinese
Spanish
Hospitals:
Arcadia Radiology Medical Group
612 W Duarte Rd Suite 101, Arcadia, CA 91007

Methodist Hospital of Southern California
300 West Huntington Drive, Arcadia, CA 91007

San Gabriel Valley Medical Center
438 West Las Tunas Drive, San Gabriel, CA 91776
Education:
Medical School
University Of California, San Francisco, School Of Medicine
Graduated: 1978
Medical School
UCLA Hospital and Clin
Graduated: 1979
Medical School
UCLA Hospital and Clin
Graduated: 1983
Medical School
University Of California San Francisco
Graduated: 1983
Wilson Wong Photo 2

Wilson Wong

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Specialties:
Cardiovascular Disease
Work:
Arkansas Heart Hospital Clinic
7 Shackleford West Blvd, Little Rock, AR 72211
(501) 664-5860 (phone), (501) 664-0889 (fax)

Arkansas Heart Hospital Clinic
205 E Race Ave, Searcy, AR 72143
(501) 268-9869 (phone), (501) 279-9128 (fax)
Education:
Medical School
Natl Taiwan Univ Coll of Med, Taipei, Taiwan (385 02 Prior 1/71)
Graduated: 1985
Procedures:
Cardiac Catheterization
Cardiac Stress Test
Cardioversion
Continuous EKG
Echocardiogram
Electrocardiogram (EKG or ECG)
Pacemaker and Defibrillator Procedures
Conditions:
Acute Myocardial Infarction (AMI)
Angina Pectoris
Aortic Valvular Disease
Atrial Fibrillation and Atrial Flutter
Cardiac Arrhythmia
Languages:
English
Russian
Spanish
Description:
Dr. Wong graduated from the Natl Taiwan Univ Coll of Med, Taipei, Taiwan (385 02 Prior 1/71) in 1985. He works in Searcy, AR and 1 other location and specializes in Cardiovascular Disease. Dr. Wong is affiliated with Arkansas Heart Hospital and Catholic Health Initiatives St Vincent North.
Wilson Wong Photo 3

Wilson S. Wong

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Specialties:
Diagnostic Radiology
Work:
Arcadia Radiology Medical Group
612 W Duarte Rd STE 101, Arcadia, CA 91007
(626) 445-4850 (phone), (626) 821-3460 (fax)

Arcadia Radiology Medical Group
438 W Las Tunas Dr, San Gabriel, CA 91776
(626) 445-4850 (phone), (626) 445-0482 (fax)
Education:
Medical School
University of California, San Francisco School of Medicine
Graduated: 1978
Languages:
Chinese
English
Spanish
Tagalog
Vietnamese
Description:
Dr. Wong graduated from the University of California, San Francisco School of Medicine in 1978. He works in San Gabriel, CA and 1 other location and specializes in Diagnostic Radiology. Dr. Wong is affiliated with Methodist Hospital Of Southern California and San Gabriel Valley Medical Center.

License Records

Wilson Wong

License #:
55728 - Active
Category:
Professional
Issued Date:
Oct 22, 2013
Expiration Date:
Dec 31, 2019

Lawyers & Attorneys

Wilson Wong Photo 4

Wilson Wong - Lawyer

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Office:
Mayer Brown JSM
Specialties:
Banking & Finance Real Estate Finance
ISLN:
909852984
Admitted:
1994

Business Records

Name / Title
Company / Classification
Phones & Addresses
Wilson Wong
Owner
Squeeze Creative Inc.
Graphic Designers
Bm-1510 Kensington Road NW, Calgary, AB, Calgary, AB T2N 4P2
(403) 313-6748
Wilson Wong
Owner
Squeeze Creative Inc
Graphic Designers
(403) 313-6748
Wilson Haulung Wong
President
IMPROVEHUB, INC
9110 Las Tunas Dr, Temple City, CA 91780
2812 Santa Monica Blvd, Santa Monica, CA 90404
Wilson S. Wong
President
W.S. WONG, M.D., INC
1419 San Carlos Rd, Arcadia, CA 91006
Wilson Wong
CTO
D and H Manufacturing Co
All Other Miscellaneous General Purpose Machinery Manufactur
49235 Milmont Dr, Fremont, CA 94538
(510) 770-1319
Wilson Wong
Managing
Jasmine Janisse, LLC
Real Estate Investment
741 Costa Rica Ave, San Mateo, CA 94402
Wilson Wong
Manager
Wilson Wong, LC
3993 Spg Mtn Rd, Las Vegas, NV 89102
Wilson Wong
LICENTIA HOLDINGS LLC
Suite SUITE J, Phoenix, AZ 85021
8015 De Soto Ave, Canoga Park, CA 91304

Publications

Us Patents

Circuitry For A Low Internal Voltage Integrated Circuit

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US Patent:
6414518, Jul 2, 2002
Filed:
Nov 24, 1999
Appl. No.:
09/449166
Inventors:
Rakesh H. Patel - Cupertino CA
John E. Turner - Santa Cruz CA
John D. Lam - Fremont CA
Wilson Wong - San Francisco CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K 1900
US Classification:
326101, 326 41, 257207
Abstract:
A technique provides an on-chip voltage to a core portion of an integrated circuit by way of a conversion transistor. The on-chip voltage may be a reduced internal voltage, less than the VCC of the integrated circuit. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. By providing the core with a reduced voltage, the integrated circuit may interface with other integrated circuits compatible with different voltage levels.

Overvoltage-Tolerant Interface For Integrated Circuits

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US Patent:
6433585, Aug 13, 2002
Filed:
Sep 22, 1999
Appl. No.:
09/401145
Inventors:
Rakesh H. Patel - Cupertino CA
John E. Turner - Santa Cruz CA
Wilson Wong - San Francisco CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K 19094
US Classification:
326 83, 326 86, 326 87, 326121
Abstract:
An input/output driver for interfacing directly with a voltage at a pad ( ) which is above a supply voltage ( ) for the input/output driver. This may be referred to as an âovervoltage condition. â For example, if the supply voltage is 3. 3 volts, a 5-volt signal may be provided at the pad of the input/output driver. The input/output driver will tolerate this voltage level and prevent leakage current paths. This will improve the performance, reliability, and longevity of the integrated circuit. The input/output driver includes a well-bias generator ( ) for preventing leakage current paths.

Computer Guided Cryosurgery

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US Patent:
6485422, Nov 26, 2002
Filed:
Oct 30, 2000
Appl. No.:
09/699938
Inventors:
Paul W. Mikus - Irvine CA
Jay Eum - Irvine CA
Wilson S. Wong - Alhambra CA
Assignee:
Endocare, Inc. - Irvine CA
International Classification:
A61B 800
US Classification:
600439, 606 21
Abstract:
A system for assisting surgeons in performing cryosurgery of the prostate by calculating optimal positions for cryoprobes and providing display based templates for overlay over an ultrasound image display, and displaying actual cryoprobes ultrasound images together with template images so that the surgeon may compare suggested and actual placement of the cryoprobes, and adjust placement accordingly.

Computer Guided Cryosurgery

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US Patent:
6544176, Apr 8, 2003
Filed:
Sep 20, 2001
Appl. No.:
09/957306
Inventors:
Paul W. Mikus - Irvine CA
Jay Eum - Irvine CA
Wilson S. Wong - Alhambra CA
Assignee:
Endocare, Inc. - Irvine CA
International Classification:
A61B 812
US Classification:
600439, 606 21
Abstract:
The present invention is a system for placing cryoprobes in a treatment area of a human patient. The system includes a computer system for displaying an image of a treatment area, a template of suggested cryoprobe palcements in the treatment area and images of actual cryoprobes placed within treatment area. The computer system is programmed to perform the steps of: acquiring the image of the treatment area, determining desired dimensions of the treatment area based on the image of the treatment area, determining the optimal cryoprobe placements in the treatment area based on the determined desired dimensions to provide the template of suggested cryoprobe placement, acquiring the images of actual cryoprobes placed within the treatment area, and overlaying the template of suggested cyroprobe placements on the acquired images of actual cryoprobes. The resulting overlaying is provided on a display of the computer system, thereby allowing the surgeon to compare the actual cryoprobe palcements with the optimal cryoprobe placements as determined by the computer system.

Circuitry For A Low Internal Voltage

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US Patent:
6563343, May 13, 2003
Filed:
Apr 30, 2002
Appl. No.:
10/136944
Inventors:
Rakesh H. Patel - Cupertino CA
John E. Turner - Santa Cruz CA
John D. Lam - Fremont CA
Wilson Wong - San Francisco CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K 190175
US Classification:
326 87, 326112
Abstract:
A technique provides an on-chip voltage to a core portion of an integrated circuit by way of a conversion transistor. The on-chip voltage may be a reduced internal voltage, less than the VCC of the integrated circuit. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. By providing the core with a reduced voltage, the integrated circuit may interface with other integrated circuits compatible with different voltage levels.

Overvoltage-Tolerant Interface For Integrated Circuits

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US Patent:
6583646, Jun 24, 2003
Filed:
May 16, 2001
Appl. No.:
09/860028
Inventors:
Rakesh H. Patel - Cupertino CA
John E. Turner - Santa Cruz CA
Wilson Wong - San Francisco CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K 190175
US Classification:
326 80, 326 68, 326 81, 326 86
Abstract:
An input/output driver for interfacing directly with a voltage at a pad which is above a supply voltage for the input/output driver. This may be referred to as an âovervoltage condition. â For example, if the supply voltage is 3. 3 volts, a 5-volt signal may be provided at the pad of the input/output driver. The input/output driver will tolerate this voltage level and prevent leakage current paths. This will improve the performance, reliability, and longevity of the integrated circuit. The input/output driver includes a well-bias generator for preventing leakage current paths.

Programmable Logic With Lower Internal Voltage Circuitry

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US Patent:
6724222, Apr 20, 2004
Filed:
Feb 13, 2003
Appl. No.:
10/366814
Inventors:
Rakesh H. Patel - Cupertino CA
John E. Turner - Santa Cruz CA
John D. Lam - Fremont CA
Wilson Wong - San Francisco CA
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K 19175
US Classification:
326 80, 326 86, 326 68, 327333
Abstract:
A technique and circuitry interfaces a programmable logic integrated circuit compatible with one voltage level to other integrated circuits compatible with a different voltage level. In particular, an on-chip voltage less than the external supply level of the programmable logic integrated circuit is provided to a core portion of a programmable logic integrated circuit by way of a conversion transistor. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. Externally, the programmable logic integrated circuit will interface with an external supply voltage level. The input and output signals to and from the programmable logic integrated circuit will be compatible with the external supply level.

Dynamically Adjustable Termination Impedance Control Techniques

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US Patent:
6888370, May 3, 2005
Filed:
Aug 20, 2003
Appl. No.:
10/645932
Inventors:
Mei Luo - San Jose CA, US
Wilson Wong - San Francisco CA, US
Assignee:
Altera Corporation - San Jose CA
International Classification:
H03K019/0175
US Classification:
326 30, 326 21, 326 23, 326 26, 326 77
Abstract:
The on-chip impedance termination circuits can be dynamically adjusted to match transmission line impedance values. A network of termination resistors on an integrated circuit provides termination impedance to a transmission line coupled to an IO pin. The termination resistors are coupled in series and in parallel with each other. Pass gates are coupled to the resistors. The pass gates are individually turned ON or OFF to couple or decouple resistors from the transmission line. Each pass gate is set to be ON or OFF to provide a selected termination resistance value to the transmission line. The termination resistance of the resistor network can be increased or decreased to match the impedance of different transmission lines. The termination resistance can also be varied to compensate for changes in the resistors caused by temperature variations on the integrated circuit or other factors.
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Wilson Olivia Wong from San Jose, CA, age ~72 Get Report