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William Kabelac

from Morgan Hill, CA
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Also known as:
Bill J Kabelac, William J Kabelac, William John Kabelac
Phone and address:
15460 La Mar Ct, Morgan Hill, CA 95037
(408) 779-6815
Connected to:
Jiri V Kabelac, 68Suzanne M Kabelac, 75Yoav Kabeli, 59Linda R Kabelis, 76Joy E Kabelitz, 46Louis J Kabelka, 67Hans Kabella, 85Eric A Kabello, 38Julie M Kabello, 55Jay A Kabelowsky, 49

William Kabelac Phones & Addresses

  • 15460 La Mar Ct, Morgan Hill, CA 95037 (408) 779-6815
  • 15460 La Mar Dr, Morgan Hill, CA 95037 (619) 213-8973

Work

Company: Motorola mobility - Sunnyvale, CA 2010 Position: Ecosystem product manager

Education

School / High School: San Jose State University Specialities: Bachelor of Science in Electrical Engineering

Resumes

Resumes

William Kabelac Photo 1

Director Of Engineering And Co-Founder At Sureline Systems

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William Kabelac Photo 2

William Kabelac Morgan Hill, CA

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Work:
Motorola Mobility
Sunnyvale, CA
2010 to 2012
Ecosystem Product Manager
Savi Technology

2008 to 2010
Senior NPI Program Manager
Savi Technology
Mountain View, CA
2005 to 2010
Savi Technology

2007 to 2008
Operations Program Manager
Savi Technology

2006 to 2007
Electrical Test Engineer
Savi Technology

2005 to 2006
Lead Hardware Quality Assurance Engineer
Specialized Bicycle Components
Santa Cruz, CA
2003 to 2005
Engineer/Partner
Specialized Bicycle Components
Morgan Hill, CA
1999 to 2005
Product Developer / Mechanical Engineer
Education:
San Jose State University
Bachelor of Science in Electrical Engineering
UCSC
Santa Clara, CA
Associates

Publications

Us Patents

Disk Drive With Information Encoded In The Position Error Signal Fields

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US Patent:
6462898, Oct 8, 2002
Filed:
Jun 16, 1998
Appl. No.:
09/097994
Inventors:
Mario Blaum - San Jose CA
William John Kabelac - Morgan Hill CA
Louis Joseph Serrano - San Jose CA
Mantle Man-Hon Yu - San Jose CA
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G11B 5596
US Classification:
360 7708, 360 49
Abstract:
There is disclosed an error correction and detection method and apparatus for retreiving predetermined data, e. g. servo data, from the position error signal (PES) fields of a disk in a data storage system. In the preferred embodiment the PES data such as the track number is mapped into codewords of an error correction code (ECC) which are then further divided into a set of symbols which are mapped onto a second set of bit vectors which have a constant weight. The preferred encoding method is selected to equalize the analog signal characteristics of the PES fields so that minimal, if any, change in the conventional servo detection circuitry needed to use the PES fields of the invention both as analog and digital information.

Apparatus And Method For Verifying Proper Data Entry And Detecting Common Typing Errors

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US Patent:
6748568, Jun 8, 2004
Filed:
Feb 26, 2001
Appl. No.:
09/791593
Inventors:
Mario Blaum - San Jose CA
William J. Kabelac - Morgan Hill CA
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1100
US Classification:
714800, 178 17 C, 178 1801, 178 23 A, 235 59, 358463, 375254
Abstract:
A method and apparatus for detecting typing errors of critical fixed series of characters (digits) by using at least one redundant parity digit. The invention detects the most common typing errors that involve both permutations and incorrect striking of adjacent characters during data entry via a keyboard of an electronic apparatus. The method provides warning to the data input operator when incorrect data entry occurs and optionally automatically suspends entry thereof.

Disk Drive With Servo Synchronous Recording

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US Patent:
6873483, Mar 29, 2005
Filed:
Feb 7, 2002
Appl. No.:
10/072406
Inventors:
Steven R. Hetzler - Los Altos CA, US
William John Kabelac - Morgan Hill CA, US
Assignee:
Hitachi Global Storage Technologies Netherlands B.V. - Amsterdam
International Classification:
G11B005/09
US Classification:
360 51, 360 7708
Abstract:
A read clock circuit for a disk drive includes a phase-locked loop/voltage controlled oscillator (VFO/PLL) and a frequency synthesizer. The VFO/PLL receives a servo sector transition signal that is related to detected transitions in a servo sector field of a magnetic recording disk, and outputs a servo frequency signal that is synchronous to the servo sector transition signal. The frequency synthesizer receives the servo frequency signal and generates the read clock signal that is synchronous with the servo frequency signal. In a banded recording disk drive the frequency synthesizer generates a unique read clock signal for each data band.

Servo Pattern Architecture To Uncouple Position Error Determination From Linear Position Information

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US Patent:
7898763, Mar 1, 2011
Filed:
Jan 13, 2009
Appl. No.:
12/353095
Inventors:
William John Kabelac - Morgan Hill CA, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G11B 5/584
US Classification:
360 7712
Abstract:
A sequential data storage medium, such as for example and without limitation a magnetic tape, comprising a plurality of servo patterns encoded in a non-data region, wherein each of said servo patterns comprises a first subframe comprising 10 pulses, a second subframe comprising 8 pulses, and a third subframe comprising (N) pulses, wherein (N) is greater than or equal to 0. The first subframe and the second subframe do not encode any linear position (“LPOS”) data. The third subframe encodes up to (N) LPOS bits.

Servo Pattern Architecture And Method Using Same To Improve Lpos Encoding Efficiency

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US Patent:
7957089, Jun 7, 2011
Filed:
Jun 5, 2008
Appl. No.:
12/134094
Inventors:
William John Kabelac - Morgan Hill CA, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G11B 5/584
US Classification:
360 7712
Abstract:
A sequential data storage medium, such as for example and without limitation a magnetic tape, comprising a sequence of plurality of servo patterns encoded therein, which provide lateral position information and LPOS information. Each servo pattern comprises a first burst comprising a first pulse, a second pulse, a third pulse, a fourth pulse and a fifth pulse and a second burst comprising a sixth pulse, a seventh pulse, an eighth pulse, a ninth pulse and a tent pulse. The widths of the plurality of pulses, in combination with the spacings between the plurality of pulses, encode two bits of data.

Correcting Errors In Longitudinal Position (Lpos) Words

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US Patent:
8271857, Sep 18, 2012
Filed:
May 13, 2008
Appl. No.:
12/119975
Inventors:
William J. Kabelac - Morgan Hill CA, US
Barry M. Trager - Yorktown Heights NY, US
Shmuel Winograd - Scarsdale NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G11C 29/00
US Classification:
714771
Abstract:
The invention includes a method for longitudinal position (LPOS) detection in a magnetic tape storage system for storing data upon linear tape open (LTO) magnetic storage tape, which data includes odd and even 36-bit LPOS words with error correcting ability. The method includes steps of encoding positional information onto the magnetic storage tape within the odd and even 36-bit LPOS words using each LPOS word's 8-bit sync mark field, Sy, and six of each LPOS word's 4-bit symbol fields, L, L, L L, L, and L, wherein 6 of 24 total bits comprising the encoded 8-bit sync mark field: Sy, and six 4-bit symbol fields: L, L, L L, L, and L are utilized as parity bits, operating the magnetic tape storage system by passing the LTO magnetic storage tape encoded with the odd and even LPOS words with error correcting ability longitudinally across a servo reader/writer at a known speed, decoding the encoded positional information by reading either two words sequentially or two words simultaneously, the simultaneous reading requiring that the LPOS words include servo band numbers and detecting and correcting both ambiguous bits and single erroneous bit errors.

System, Method, And Computer Program Product For Analyzing Monitor Data Information From A Plurality Of Memory Devices Having Finite Endurance And/Or Retention

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US Patent:
8316173, Nov 20, 2012
Filed:
Apr 8, 2009
Appl. No.:
12/420628
Inventors:
Steven Robert Hetzler - Los Altos CA, US
William John Kabelac - Morgan Hill CA, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 12/00
US Classification:
711103, 711162, 36518509, 36518522
Abstract:
A method according to one embodiment includes gathering monitor data information from a plurality of memory devices having finite endurance and/or retention, the monitor data being data of known content stored in dedicated memory cells of known write cycle count; analyzing the monitor data information; and taking an action relating to at least one of the devices based on the analyzing. Additional systems, methods, and computer program products are also disclosed.

Servo Pattern Architecture And Method Using Same To Improve Lpos Encoding Efficiency

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US Patent:
8325439, Dec 4, 2012
Filed:
Apr 29, 2011
Appl. No.:
13/098377
Inventors:
William J. Kabelac - Morgan Hill CA, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G11B 5/584
US Classification:
360 7712
Abstract:
A sequential data storage medium, such as for example and without limitation a magnetic tape, comprising a sequence of plurality of servo patterns encoded therein, which provide lateral position information and LPOS information. Each servo pattern comprises a first burst comprising a first pulse, a second pulse, a third pulse, a fourth pulse and a fifth pulse and a second burst comprising a sixth pulse, a seventh pulse, an eighth pulse, a ninth pulse and a tenth pulse. The widths of the plurality of pulses, in combination with the spacings between the plurality of pulses, encode two bits of data.
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William Kabelac from Morgan Hill, CA Get Report