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Wenfeng M Zhang

from San Jose, CA
Age ~58
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Also known as:
Wen Feng Zhang, Wen-Feng Zhang, Wen Fengzhang, Zhang Wen-Feng
Phone and address:
1029 Craig Dr, San Jose, CA 95129
(408) 725-8108
Connected to:
Aaron N Zhang, 60Adelaide X Zhang, 48Aiai Zhang, 38Aijun Zhang, 70Airong Zhang, 71Alfred Zhang, 30Anderson Zhang, 34Angeline Zhang, 36Anli Zhang, 68Anming Zhang, 64

Wenfeng Zhang Phones & Addresses

  • 1029 Craig Dr, San Jose, CA 95129 (408) 725-8108 (408) 253-1920
  • Pleasanton, CA
  • Camarillo, CA
  • San Ramon, CA
  • Cupertino, CA
  • 1029 Craig Dr, San Jose, CA 95129

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Resumes

Resumes

Wenfeng Zhang Photo 1

Senior Program Manager

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Location:
San Francisco, CA
Industry:
Biotechnology
Work:
Nauto
Senior Program Manager
Neurosky Apr 2016 - Mar 2019
Senior Manager of Hardware Engineering
Neurosky Apr 2016 - Mar 2019
Head of Engineering
Neurosky May 2014 - Mar 2016
Manager of Hardware Engineering
Neurosky Apr 2012 - Apr 2014
Senior Hardware and Firmware Engineer
Education:
University of California, Berkeley 2007 - 2009
Bachelors, Bachelor of Science, Electrical Engineering De Anza College 2005 - 2007
Skills:
Asic
Matlab
C
Signal Processing
Verilog
Fpga
Embedded Systems
C++
Python
Image Processing
Algorithms
Labview
Application Specific Integrated Circuits
Consumer Electronics
Engineering Management
Product Development
Programming
Project Management
System on A Chip
Hardware Architecture
Semiconductor Industry
Semiconductors
Debugging
Testing
Program Management
Embedded C
Cross Functional Team Leadership
Leadership
Bluetooth Low Energy
Languages:
English
Mandarin
Wenfeng Zhang Photo 2

Mixed Signal Ic Design Engineer

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
Xilinx
Mixed Signal Ic Design Engineer
Wenfeng Zhang Photo 3

Wenfeng Zhang

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Publications

Us Patents

High Speed, Low Power Signal Level Shifter

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US Patent:
7839173, Nov 23, 2010
Filed:
Aug 11, 2009
Appl. No.:
12/539522
Inventors:
Wenfeng Zhang - San Jose CA, US
Qi Zhang - Chandler AZ, US
Jian Tan - Fremont CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H03K 19/0175
US Classification:
326 81, 326 87
Abstract:
A system for signal level shifting in an IC can include a first inverter having a first pull-up device and a pull-down device, wherein the first inverter is operable to receive an input signal having a voltage potential at a logic high that does not disable the first pull-up device. The system can include a second inverter coupled in series to an output of the first inverter, and a control module coupled to the output of the first inverter and an output of the second inverter. Prior to the input signal transitioning to the logic high, the control module is operable to decouple the input signal from the first pull-up device, disable the first pull-up device, and close a feedback loop that latches an output state of the second inverter.

Voltage Regulator

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US Patent:
8330529, Dec 11, 2012
Filed:
Jan 28, 2010
Appl. No.:
12/696010
Inventors:
Wenfeng Zhang - San Jose CA, US
Qi Zhang - Chandler AZ, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H03K 3/01
US Classification:
327534, 327530, 327538, 323312, 323316, 324416
Abstract:
Embodiments of a method, apparatus and circuit for voltage regulation are disclosed. One embodiment of a circuit includes a first field effect transistor (FET) having a gate, a drain and a source. A current source is connected to the drain of the FET. A second FET has a source connected to the source of the first FET by a node. The second FET also has a gate. A low-pass filter circuit has an input connected to the gate of the first FET and an output connected to the gate of the second FET.

Method For Increasing Active Inductor Operating Range And Peaking Gain

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US Patent:
20170134009, May 11, 2017
Filed:
Nov 5, 2015
Appl. No.:
14/933346
Inventors:
- San Jose CA, US
Wenfeng Zhang - San Jose CA, US
Parag Upadhyaya - Los Gatos CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H03K 3/01
Abstract:
Methods and apparatus are described for a differential active inductor load for inductive peaking in which cross-coupled capacitive elements are used to cancel out, or at least reduce, the limiting effect of the gate-to-drain capacitance (C) of transistors in the active inductor load. The cross-coupled capacitive elements extend the range over which the active inductor load behaves inductively and increase the quality factor (Q) of each active inductor. Therefore, the achievable inductive peaking of the load is significantly increased, which leads to providing larger signal swing across the load for a given power or, alternatively, lower power for a given signal swing.

System And Method For Mounting Heads-Up Display Modules

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US Patent:
20160124227, May 5, 2016
Filed:
Oct 31, 2014
Appl. No.:
14/530660
Inventors:
Hai Yong Zhang - San Jose CA, US
Wenfeng Zhang - San Jose CA, US
Chenchen Zheng - San Jose CA, US
Peng Shao - San Jose CA, US
Jia Chi Wu - San Jose CA, US
Jia Ning Zhao - Fremont CA, US
David Pommerenke - Rolla MO, US
International Classification:
G02B 27/01
Abstract:
A device comprising means for engaging said device to at least a portion of an outside surface of a glass of a headwear, means for engaging said device to at least a portion of an inside surface of glass of said headwear, means for mounting a display module or video capturing device and said means for engaging said device to at least a portion of an inside surface of a headwear to said device, and means for adjusting a viewing angle of said display module or video capturing device with a generally 360 degrees rotation.
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Wenfeng M Zhang from San Jose, CA, age ~58 Get Report