Resumes
Resumes

Senior Stuff Design Engineer
View pageLocation:
Austin, TX
Industry:
Semiconductors
Work:
Silicon Labs
Senior Stuff Design Engineer
Intel Corporation Sep 2010 - Oct 2011
Soc Integration Engineer
St-Ericsson Apr 2007 - Oct 2010
Senior Design Engineer
Silicon Labs Mar 2004 - Apr 2007
Design Engineer
Senior Stuff Design Engineer
Intel Corporation Sep 2010 - Oct 2011
Soc Integration Engineer
St-Ericsson Apr 2007 - Oct 2010
Senior Design Engineer
Silicon Labs Mar 2004 - Apr 2007
Design Engineer
Education:
The University of Texas at Austin 1997 - 1999
Master of Science, Masters, Computer Engineering
Master of Science, Masters, Computer Engineering
Skills:
Static Timing Analysis
Verilog
Rtl Design
Soc
Primetime
Timing Closure
Logic Synthesis
Formal Verification
Place and Route
Low Power Design
Physical Design
Pll
Verilog
Rtl Design
Soc
Primetime
Timing Closure
Logic Synthesis
Formal Verification
Place and Route
Low Power Design
Physical Design
Pll