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Vijaya G Raghavan

from Brookline, MA
Age ~55
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Also known as:
Vijaya Raghaven
Phone and address:
27 Somerset Rd, Brookline, MA 02445
Related to:
Vishnu S Raghavan, 26
Connected to:
Abhishek Raghavan, 29Akshaya N Raghavan, 34Anil K Raghavan, 50Anu Raghav, 48Aparna M Raghava, 51Bhooma Raghavan, 47Charu Raghav, 65Gopalakrishna Raghavan, 55Harsha Raghavan, 45Karthic Raghavan, 50

Vijaya Raghavan Phones & Addresses

  • 27 Somerset Rd, Brookline, MA 02445
  • 145 University Rd, Brookline, MA 02445 (617) 487-8827
  • Cupertino, CA
  • 38 Crestwood Dr, Framingham, MA 01701 (508) 872-9332
  • 27 Georgetown Dr, Framingham, MA 01702 (508) 872-9332
  • Willimantic, CT
  • Storrs Mansfield, CT
  • Willington, CT

Business Records

Name / Title
Company / Classification
Phones & Addresses
Vijaya Raghavan
Soc signatory
VINA PHARMA CONSULTANTS, LLC
83 Cambridge Pkwy UNIT W403, Cambridge, MA 02142
83 Cambridge Pkwy, Cambridge, MA 02142

Publications

Isbn (Books And Publications)

Handbook of Postharvest Technology: Cereals, Fruits, Vegetables, Tea, and Spices

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Author

Vijaya Raghavan

ISBN #

0824705149

Us Patents

Graphical Functions

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US Patent:
7720656, May 18, 2010
Filed:
May 14, 2001
Appl. No.:
09/855199
Inventors:
Vijaya Raghavan - Framingham MA, US
Jay Ryan Torgerson - Southborough MA, US
Assignee:
The Math Works, Inc. - Natick MA
International Classification:
G06G 7/48
G06F 9/44
US Classification:
703 6, 717109
Abstract:
A method, system and computer program product to define and utilize functions graphically is provided which may be used in the simulation of finite state machines. The functions may combine mathematical, logical, non-linear and comparative operations. The graphical elements of the function may be hidden for ease of display of various portions of a model.

Event-Based Temporal Logic

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US Patent:
7941303, May 10, 2011
Filed:
Sep 8, 2008
Appl. No.:
12/231993
Inventors:
Vijaya Raghavan - Framingham MA, US
Ebrahim Mehran Mestchian - Newton MA, US
Assignee:
The MathWorks, Inc. - Natick MA
International Classification:
G06F 17/10
US Classification:
703 2, 703 15, 703 16, 703 17
Abstract:
A method for modeling a system as a finite state machine in a modeling environment is discussed. Embodiments receive a representation of a finite state machine model and provide an interface for incorporating a temporal operator into the finite state machine model. The temporal operator may be a Boolean function that includes at least one event parameter and defines a temporal logic condition. Embodiments may also receive a definition of a first temporal operator that defines a logic condition related to a number of occurrences of two or more different base events.

Graphical Functions

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US Patent:
8170850, May 1, 2012
Filed:
Jan 24, 2011
Appl. No.:
13/012314
Inventors:
Vijaya Raghavan - Brookline MA, US
Jay Ryan Torgerson - Hopkinton MA, US
Assignee:
The MathWorks, Inc. - Natick MA
International Classification:
G06G 7/48
US Classification:
703 6, 703 22, 717109
Abstract:
A method, system and computer program product to define and utilize functions graphically is provided which may be used in the simulation of finite state machines. The functions may combine mathematical, logical, non-linear and comparative operations. The graphical elements of the function may be hidden for ease of display of various portions of a model.

Conditionally Executed States

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US Patent:
8364456, Jan 29, 2013
Filed:
Jan 10, 2008
Appl. No.:
11/972151
Inventors:
Vijaya Raghavan - Framingham MA, US
Zhihong Zhao - Newton MA, US
Assignee:
The MathWorks, Inc. - Natick MA
International Classification:
G06G 7/48
G06G 7/58
G06G 7/62
G06F 17/50
US Classification:
703 13, 703 6, 703 7, 703 8, 703 9, 703 22
Abstract:
A system generates a state diagram model in a graphical modeling system, where the state diagram model includes at least one state. A condition statement is associated with the at least one state, and defines a condition upon which one or more actions associated with the at least one state are executed.

Technique For Automatically Assigning Placement For Pipeline Registers Within Code Generated From A Program Specification

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US Patent:
8402449, Mar 19, 2013
Filed:
Jan 10, 2008
Appl. No.:
11/972117
Inventors:
Partha Biswas - Framingham MA, US
Vijaya Raghavan - Framingham MA, US
Zhihong Zhao - Newton MA, US
Assignee:
The MathWorks, Inc. - Natick MA
International Classification:
G06F 9/45
US Classification:
717146, 717152, 717153, 717106
Abstract:
A system and method automatically inserts pipelines into a high-level program specification. An Intermediate Representation (IR) builder creates one or more graphs or trees based on the high-level program specification. A scheduler iteratively applies a bounded scheduling algorithm to produce an execution schedule for the IR minimizing overall execution time for a given number of pipeline stages. A Hardware Description Language (HDL) code generator may utilize the pipelined, scheduled IR to generate optimized HDL code corresponding to the high-level program specification. An annotated version of the high-level program specification showing where the pipelines have been inserted may be displayed allowing additional design exploration.

Mounting Process For Outgassing-Sensitive Optics

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US Patent:
20020157759, Oct 31, 2002
Filed:
Dec 7, 2001
Appl. No.:
10/016568
Inventors:
Vijaya Raghavan - Los Altos CA, US
Mark Sullivan - Mountain View CA, US
Gerald Purmal - Los Gatos CA, US
International Classification:
B29C065/00
US Classification:
156/080000
Abstract:
Optics used in a high vacuum environment are mounted by bonding by use of addition polymerizing material which used in that environment. The suitability for use in the high vacuum environment is achieved by precise control of outgassing of trapped and dissolved gases, including low molecular weight hydrocarbons and amines, and unreacted material from component parts of said addition polymerizing material. A plurality of application quantities of the polymer are prepared in a large batch for use as pre-mixed frozen (PMF) material. The use of the large batch enables more precise control of mixture so that near-stoichiometric proportions of the polymer components are easily achieved.

Event-Based Temporal Logic

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US Patent:
20030046658, Mar 6, 2003
Filed:
May 2, 2001
Appl. No.:
09/847391
Inventors:
Vijaya Raghavan - Framingham MA, US
Ebrahim Mestchian - Newton MA, US
International Classification:
G06F009/44
US Classification:
717/106000
Abstract:
A computer system receives a description of a finite state machine including a temporal logic condition and generates code for emulating the described finite state machine.

Process For The Reduction Of Undesirable Outgassing Species

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US Patent:
20040046008, Mar 11, 2004
Filed:
Sep 10, 2002
Appl. No.:
10/241701
Inventors:
Vijaya Raghavan - Los Altos CA, US
Mark Sullivan - Mountain View CA, US
International Classification:
B23K001/20
US Classification:
228/214000
Abstract:
A method to reduce undesirable outgassing includes bonding at least two optical components with a bonding material and encapsulating the bonding material with a capping material. The capping material inhibits the outgassing of species that would otherwise be emitted from the bonding material to the surrounding. In one example, the bonding material is silicone and the capping material is epoxy.
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Vijaya G Raghavan from Brookline, MA, age ~55 Get Report