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Vijay R Mangtani

from Nashua, NH
Age ~58
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Also known as:
Vijay R Mangiani, Vijay I
Phone and address:
7 Terramar Ln, Nashua, NH 03062
(603) 305-0674
Related to:
Rohit MangtaniShefali Mangtani, 27
Connected to:
John Mangu, 99Abigail Mangual, 51Ariana I Mangual, 31Desiree Mangual, 33Elias E Mangual, 51Francisco J Mangual, 38Jan F Mangual, 43Juan C Mangual, 49Mixolidia M Mangual, 83Orlando Mangual, 58

Vijay Mangtani Phones & Addresses

  • 7 Terramar Ln, Nashua, NH 03062 (603) 305-0674
  • 20144 Northwind Sq, Cupertino, CA 95014
  • Playa del Rey, CA
  • 620 Iris Ave, Sunnyvale, CA 94086
  • El Segundo, CA

Work

Company: Allegro microsystems, llc Mar 2004 Position: Vice president - power ic business unit

Education

Degree: Bachelors, Bachelor of Science In Electrical Engineering School / High School: Saurashtra University, Rajkot 1984 to 1988 Specialities: Electronics

Skills

Sales

Industries

Semiconductors

Resumes

Resumes

Vijay Mangtani Photo 1

Vice President - Power Ic Business Unit

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Location:
Nashua, NH
Industry:
Semiconductors
Work:
Allegro Microsystems, Llc
Vice President - Power Ic Business Unit
Maxim Integrated 1999 - 2004
Business Manager
International Rectifier 1992 - 1999
Business Manager, Design and Application Engineering Manager
Education:
Saurashtra University, Rajkot 1984 - 1988
Bachelors, Bachelor of Science In Electrical Engineering, Electronics
Skills:
Sales

Publications

Us Patents

Method To Synchronize Multiple Switching Regulators In Out Of Phase Mode Without Pll

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US Patent:
6404657, Jun 11, 2002
Filed:
Oct 12, 2001
Appl. No.:
09/976586
Inventors:
Vijay R. Mangtani - Sunnyvale CA
Len Sherman - Los Altos Hills CA
Assignee:
Maxim Integrated Products - Sunnyvale CA
International Classification:
H02M 100
US Classification:
363 72
Abstract:
The present invention is a method and apparatus to synchronize multiple switching regulators in out of phase mode without a phase locked loop. In the present invention, each multiple slave device is connected to a master device and to one another in series, as well as connected to a master clock signal. After a DH, LX or DL output from a preceding device is detected by a following connected slave device, the first subsequent edge of a master clock signal serves to reset the internal clock of the slave device. Each slave device in turn, drives a separate power MOSFET pair in out of phase mode, based upon the output of the preceding device and synchronized to the master clock signal. In the case of multiple regulators, synchronization may be used to reduce electronic noise levels or confine noise to known non-sensitive frequency bands.

Power Module With Closely Spaced Printed Circuit Board And Substrate

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US Patent:
6424026, Jul 23, 2002
Filed:
Aug 2, 2000
Appl. No.:
09/630694
Inventors:
Vijay Mangtani - Playa del Rey CA
Assignee:
International Rectifier Corporation - El Segundo CA
International Classification:
H01L 23495
US Classification:
257675, 257706
Abstract:
A power module has a printed circuit control component board disposed atop an IMS with an opening in the printed circuit board exposing the top surface of the IMS and power semiconductor die mounted thereon. The top surface of the IMS is closely spaced to the top surface of the printed circuit board so that wire bonds have a reduced drop from the printed circuit board to the IMS. The IMS may be cemented to the periphery of the opening in the printed circuit board, or may be located toward the top of an opening in an insulation support shell which receives a mesa from a support heat sink, which permits the close spacing of printed circuit board and IMS.

Differential Output Switching Converter With Ripple Reduction

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US Patent:
6462520, Oct 8, 2002
Filed:
May 9, 2001
Appl. No.:
09/851666
Inventors:
Vijay Mangtani - Sunnyvale CA
Leonard Harris Sherman - Los Altos CA
Assignee:
Maxim Integrated Products, Inc. - Sunnyvale CA
International Classification:
G05F 140
US Classification:
323271
Abstract:
A differential switching converter system is disclosed. The converter system includes a plurality of switching converters having at least first and second converters. The plurality of switching converters is coupled in a differential configuration across an output load. Each converter has at least first and second transistors configured to apply and receive energy to and from an energy storage element. The converter system also includes a controller, which is configured to control the operation of the first and second transistors of each converter. The controller synchronizes turn-on and turn-off of the first transistor in the first converter with that of the first transistor in the second converter. The controller also controls turn-on and turn-off of the second transistors in the first and second converters to provide first and second duty cycles, respectively.

Current Sensor

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US Patent:
7075287, Jul 11, 2006
Filed:
Jan 20, 2006
Appl. No.:
11/336602
Inventors:
Vijay Mangtani - Nashua NH, US
Michael C. Doogue - Manchester NH, US
William P. Taylor - Amherst NH, US
Assignee:
Allegro Microsystems, Inc. - Worcester MA
International Classification:
G01R 33/00
US Classification:
324117H
Abstract:
An integrated circuit current sensor includes a lead frame having at least two leads coupled to provide a current conductor portion, and a substrate having a first surface in which is disposed one or more magnetic field sensing elements, with the first surface being proximate to the current conductor portion and a second surface distal from the current conductor portion. In one particular embodiment, the substrate is disposed having the first surface of the substrate above the current conductor portion and the second surface of the substrate above the first surface. In this particular embodiment, the substrate is oriented upside-down in the integrated circuit in a flip-chap arrangement. The integrated circuit includes an overcurrent circuit responsive to a voltage drop generated by a current.

Current Sensor

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US Patent:
7476816, Jan 13, 2009
Filed:
Apr 10, 2006
Appl. No.:
11/401160
Inventors:
Michael C. Doogue - Manchester NH, US
Vijay Mangtani - Nashua NH, US
William P. Taylor - Amherst NH, US
Assignee:
Allegro Microsystems, Inc. - Worecester MA
International Classification:
H01L 23/48
US Classification:
174528, 324117 H, 257672, 257676
Abstract:
An integrated circuit current sensor includes a lead frame having at least two leads coupled to provide a current conductor portion, and a substrate having a first surface in which is disposed one or more magnetic field sensing elements, with the first surface being proximate to the current conductor portion and a second surface distal from the current conductor portion. In one particular embodiment, the substrate is disposed having the first surface of the substrate above the current conductor portion and the second surface of the substrate above the first surface. In this particular embodiment, the substrate is oriented upside-down in the integrated circuit in a flip-chap arrangement. The lead frame also includes a shunt conductor portion formed as a coupling of the at least two leads.

Capacitor Charging Methods And Apparatus

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US Patent:
7646616, Jan 12, 2010
Filed:
May 9, 2005
Appl. No.:
11/125300
Inventors:
Shashank S. Wekhande - Nashua NH, US
Vijay R. Mangtani - Nashua NH, US
Sihua Wen - Nashua NH, US
Assignee:
Allegro Microsystems, Inc. - Worcester MA
International Classification:
H02M 3/335
US Classification:
363 2112, 363 20
Abstract:
A capacitor charging circuit is provided with a primary side output voltage sensing circuit for generating a control signal indicative of whether the output voltage has reached a desired level. The control signal is unaffected by voltage spikes occurring when the main switch is turned off. In one embodiment, the circuit filters the primary side voltage for comparison to a reference voltage in order to provide the control signal. In another embodiment, an AND gate provides the control signal indicating that the output voltage has reached the desired level only in response to the primary side voltage being greater than a reference voltage and the secondary current being discontinuous. In a further embodiment, an AND gate provides the control signal indicating that the output voltage has reached the desired levels only in response to a predetermined delay occurring after the primary side voltage becomes greater than a reference voltage and the secondary current being discontinuous. According to a further aspect of the invention, an auxiliary switch is provided to reduce the reverse recovery time of the output diode in order to speed up the capacitor charging time.

Electronic Circuit For Driving A Diode Load

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US Patent:
7675245, Mar 9, 2010
Filed:
Jan 4, 2007
Appl. No.:
11/619675
Inventors:
Gregory Szczeszynski - Nashua NH, US
Shashank Wekhande - Nashua NH, US
Vijay Mangtani - Nashua NH, US
Assignee:
Allegro Microsystems, Inc. - Worcester MA
International Classification:
G05F 1/00
G09G 5/00
US Classification:
315291, 315307, 315247, 315185 S, 315312, 345212, 345211, 345204, 345102
Abstract:
An electronic circuit includes circuit portions for identifying a largest voltage drop through one of a plurality of series connected diode strings and for controlling a boost switching regulator according to the largest voltage drop. The electronic circuit can sense an open circuit series connected diode string, which would otherwise have the largest voltage drop, and can disconnect that open circuit series connected diode string from control of the boost switching regulator. Another electronic circuit includes a current limiting circuit coupled to or within a boost switching regulator and configured to operate with a diode load. Another electronic circuit includes a pulse width modulation circuit configured to dim a series connected string of light emitting diodes.

Arrangements For An Integrated Sensor

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US Patent:
7768083, Aug 3, 2010
Filed:
Jan 20, 2006
Appl. No.:
11/335944
Inventors:
Michael C. Doogue - Manchester NH, US
William P. Taylor - Amherst NH, US
Vijay Mangtani - Nashua NH, US
Assignee:
Allegro Microsystems, Inc. - Worcester MA
International Classification:
H01L 29/82
US Classification:
257422, 257427, 257E29323
Abstract:
An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.
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Vijay R Mangtani from Nashua, NH, age ~58 Get Report