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Vatsal Dholabhai Phones & Addresses

  • Boise, ID
  • El Segundo, CA
  • Redwood City, CA
  • Portola Valley, CA
  • Stanford, CA
  • 938 Hillcrest Dr, Redwood City, CA 94062

Work

Company: Nvidia corp Sep 2011 Position: Senior physical implementation engineer

Education

School / High School: Stanford University 2001 to 2003

Skills

Circuit Design • Asic • Physical Design • Timing Closure • Static Timing Analysis • Application Specific Integrated Circuits • System on A Chip • Semiconductors • Integrated Circuit Design • Microprocessors • Integrated Circuits • Floorplanning • Logic Synthesis • Project Management • Feasibility Studies • Pnr • Cadence Virtuoso • Cadence Schematic Capture • Cadence Encounter • Cadence Virtuoso Layout Editor • Synopsys Primetime • Synopsys Tools • Mentor Graphics • Hspice • Spice • Verilog • Vhdl • Clock Tree Synthesis • Clocks • Clock Distribution • Schematic Capture • Formal Verification • Functional Verification • Gds • Design Rule Checking • People Management • People Development • Project Planning • Project Estimation • Analytical Skills • Cross Functional Team Leadership • Communication • Grant Writing • Negotiation • Strategy • Vendor Management • Problem Solving • Perl • Tcl • Shell Scripting

Languages

Gujarati • Hindi • English

Industries

Semiconductors

Resumes

Resumes

Vatsal Dholabhai Photo 1

Physical Design For Edge Inference Asics For Neural Networks, Ai And Machine Learning

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Location:
Boise, ID
Industry:
Semiconductors
Work:
NVIDIA Corp since Sep 2011
Senior Physical Implementation Engineer

Synaptics Inc Jan 2011 - Sep 2011
IC Design Team Lead

Synaptics Inc Mar 2007 - Dec 2010
IC Design Engineer

Transmeta Corp Apr 2006 - Mar 2007
Senior Circuit Design Engineer

Transmeta Corp Aug 2003 - Mar 2006
Circuit Design Engineer
Education:
Stanford University 2001 - 2003
National Institute of Technology Surat 1997 - 2001
Skills:
Circuit Design
Asic
Physical Design
Timing Closure
Static Timing Analysis
Application Specific Integrated Circuits
System on A Chip
Semiconductors
Integrated Circuit Design
Microprocessors
Integrated Circuits
Floorplanning
Logic Synthesis
Project Management
Feasibility Studies
Pnr
Cadence Virtuoso
Cadence Schematic Capture
Cadence Encounter
Cadence Virtuoso Layout Editor
Synopsys Primetime
Synopsys Tools
Mentor Graphics
Hspice
Spice
Verilog
Vhdl
Clock Tree Synthesis
Clocks
Clock Distribution
Schematic Capture
Formal Verification
Functional Verification
Gds
Design Rule Checking
People Management
People Development
Project Planning
Project Estimation
Analytical Skills
Cross Functional Team Leadership
Communication
Grant Writing
Negotiation
Strategy
Vendor Management
Problem Solving
Perl
Tcl
Shell Scripting
Languages:
Gujarati
Hindi
English

Publications

Us Patents

Repeater Circuit Having Different Operating And Reset Voltage Ranges, And Methods Thereof

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US Patent:
7173455, Feb 6, 2007
Filed:
Jun 28, 2004
Appl. No.:
10/879808
Inventors:
Robert Paul Masleid - Monte Sereno CA, US
Vatsal Dholabhai - Portola Valley CA, US
Christian Klingner - San Jose CA, US
Assignee:
Transmeta Corporation - Santa Clara CA
International Classification:
H03K 19/0175
H03K 19/094
US Classification:
326 86, 326 23, 326 27
Abstract:
A circuit for assisting signal transitions on a wire, and a method thereof. A first subcircuit causes a first transistor that is coupled to the circuit's output to turn on during a rising transition and drive the output to a high state to assist in the rising transition. A second subcircuit causes a second transistor that is coupled to the circuit's output to turn on during a falling transition and drive the output to a low state to assist in the falling transition. A third subcircuit resets elements of the first subcircuit. The first subcircuit operates above a first voltage threshold and the third subcircuit operates below the first voltage threshold. A fourth subcircuit resets elements of the second subcircuit. The second subcircuit operates below a second voltage threshold and the fourth subcircuit operates above the second voltage threshold.

Repeater Circuit With High Performance Repeater Mode And Normal Repeater Mode, Wherein High Performance Repeater Mode Has Fast Reset Capability

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US Patent:
7304503, Dec 4, 2007
Filed:
Jun 28, 2004
Appl. No.:
10/879645
Inventors:
Robert Paul Masleid - Monte Sereno CA, US
Vatsal Dholabhai - Portola Valley CA, US
Assignee:
Transmeta Corporation - Santa Clara CA
International Classification:
H03K 19/0175
H03K 19/094
US Classification:
326 86, 326 23, 326 27
Abstract:
Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability, is provided and described. In one embodiment, switches are set to a first switch position to operate the repeater circuit in the high performance repeater mode. In another embodiment, switches are set to a second switch position to operate the repeater circuit in the normal repeater mode.

Repeater Circuit With High Performance Repeater Mode And Normal Repeater Mode, Wherein High Performance Repeater Mode Has Fast Reset Capability

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US Patent:
7592839, Sep 22, 2009
Filed:
Dec 4, 2007
Appl. No.:
11/999293
Inventors:
Robert Paul Masleid - Monte Sereno CA, US
Vatsal Dholabhai - Portola Valley CA, US
International Classification:
H03K 19/0175
H03K 19/094
US Classification:
326 86, 327112, 326 23, 326 27
Abstract:
Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability, is provided and described. In one embodiment, switches are set to a first switch position to operate the repeater circuit in the high performance repeater mode. In another embodiment, switches are set to a second switch position to operate the repeater circuit in the normal repeater mode.

Repeater Circuit Having Different Operating And Reset Voltage Ranges, And Methods Thereof

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US Patent:
7595664, Sep 29, 2009
Filed:
Feb 6, 2007
Appl. No.:
11/703323
Inventors:
Robert Paul Masleid - Monte Sereno CA, US
Vatsal Dholabhai - Portola Valley CA, US
Christian Klingner - San Jose CA, US
International Classification:
H03K 19/0175
H03K 19/094
US Classification:
326 86, 326 23, 326 27
Abstract:
A circuit for assisting signal transitions on a wire, and a method thereof. A first subcircuit causes a first transistor that is coupled to the circuit's output to turn on during a rising transition and drive the output to a high state to assist in the rising transition. A second subcircuit causes a second transistor that is coupled to the circuit's output to turn on during a falling transition and drive the output to a low state to assist in the falling transition. A third subcircuit resets elements of the first subcircuit. The first subcircuit operates above a first voltage threshold and the third subcircuit operates below the first voltage threshold. A fourth subcircuit resets elements of the second subcircuit. The second subcircuit operates below a second voltage threshold and the fourth subcircuit operates above the second voltage threshold.

Circuit With Enhanced Mode And Normal Mode

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US Patent:
8018252, Sep 13, 2011
Filed:
Aug 25, 2009
Appl. No.:
12/546960
Inventors:
Robert Paul Masleid - Monte Sereno CA, US
Vatsal Dholabhai - Portola Valley CA, US
International Classification:
H03K 19/0173
H03K 19/094
US Classification:
326 86, 326 23, 326 27, 326 34
Abstract:
Circuit with enhanced mode and normal mode is provided and described. In one embodiment, switches are set to a first switch position to operate the circuit in the enhanced mode. In another embodiment, switches are set to a second switch position to operate the circuit in the normal mode.

Repeater Circuit With High Performance Repeater Mode And Normal Repeater Mode

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US Patent:
20050270070, Dec 8, 2005
Filed:
Jun 28, 2004
Appl. No.:
10/879879
Inventors:
Robert Masleid - Monte Sereno CA, US
Vatsal Dholabhai - Portola Valley CA, US
Steven Stoiber - Los Altos CA, US
Gurmeet Singh - Fremont CA, US
International Classification:
H03K019/094
US Classification:
326121000
Abstract:
Repeater circuit with high performance repeater mode and normal repeater mode is provided and described. In one embodiment, switches are set to a first switch position to operate repeater circuit in the high performance repeater mode. In another embodiment, switches are set to a second switch position to operate the repeater circuit in the normal repeater mode.
Vatsal G Dholabhai from Boise, ID, age ~45 Get Report