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Vassilis G Keramidas

from Warren, NJ
Age ~86

Vassilis Keramidas Phones & Addresses

  • 8 Conklin Ln, Warren, NJ 07059 (732) 356-0680 (732) 560-9371
  • New York, NY
  • Chatham, NJ
  • Plainfield, NJ
  • 8 Conklin Ln, Warren, NJ 07059 (908) 930-7914

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Resumes

Resumes

Vassilis Keramidas Photo 1

Vassilis Keramidas

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Location:
New York, NY
Industry:
Research
Vassilis Keramidas Photo 2

Owner

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Location:
New York, NY
Industry:
Research
Work:
Telcordia Technologies 1984 - 2003
Vice President , Applied Research

Bellcore Now Telcordia Technologies 1984 - 2003
Vive President

Keramidas International Associates 1984 - 2003
Owner
Vassilis Keramidas Photo 3

Vassilis Keramidas

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Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Vassilis G. Keramidas
Owner
Keramidas' International Association LLC
Management Consulting Services
8 Conklin Ln, Warren, NJ 07059

Publications

Us Patents

Beryllium-Gold Ohmic Contact To A Semiconductor Device

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US Patent:
44145616, Nov 8, 1983
Filed:
Sep 7, 1982
Appl. No.:
6/415664
Inventors:
Vassilis G. Keramidas - Warren NJ
Robert J. McCoy - Chatham NJ
Henryk Temkin - New Providence NJ
Assignee:
Bell Telephone Laboratories, Incorporated - Murray Hill NJ
International Classification:
H01L 2348
H01L 2946
H01L 2962
US Classification:
357 67
Abstract:
An ohmic contact to a semiconductor device comprising p-type InP is formed by sequentially depositing beryllium-gold and gold layers on InP and then heat-treating the device at a temperature less than 440 degrees C. An ohmic contact to p-type InGaAsP can be similarly formed.

Ohmic Contact To Aluminum-Containing Compound Semiconductors

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US Patent:
40818241, Mar 28, 1978
Filed:
Mar 24, 1977
Appl. No.:
5/780977
Inventors:
Vassilis George Keramidas - Warren NJ
Assignee:
Bell Telephone Laboratories, Incorporated - Murray Hill NJ
International Classification:
H01L 2348
B01J 1700
US Classification:
357 67
Abstract:
A consistently low resistance ohmic contact is made to an aluminum-containing compound semiconductor by a multilayer deposition and heat treatment process. The process includes the deposition of a transition layer on the semiconductor surface to be contacted and an overlying gold layer to provide external contact. The transition layer consists of aluminum and a shallow dopant element which may be deposited as successive layers or together. After the transition layer and the gold overlay are deposited, the composite is raised to a temperature at which the transition layer is liquid. In cases in which the gold-dopant binary system has a polyphase region, it is preferable to select the thickness of the gold layer such that the gold-dopant alloy is in the solid solution region of the phase diagram of that binary system, to prevent enhanced diffusion to the upper gold surface along grain boundaries. In an exemplary realization, an Al-Sn layer was used to contact n-type GaAlAs.

Ohmic Contact To P-Type Inp

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US Patent:
43661866, Dec 28, 1982
Filed:
Sep 27, 1979
Appl. No.:
6/079451
Inventors:
Vassilis G. Keramidas - Warren NJ
Robert J. McCoy - Chatham NJ
Henryk Temkin - New Providence NJ
Assignee:
Bell Telephone Laboratories, Incorporated - Murray Hill NJ
International Classification:
H01L 2128
B05D 512
US Classification:
427 89
Abstract:
An ohmic contact to a semiconductor device comprising p-type InP is formed by sequentially depositing beryllium-gold and gold layers on InP and then heat-treating the device at a temperature less than 440 degrees C. An ohmic contact to p-type InGaAsP can be similarly formed.

Monolithic Opto-Isolator

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US Patent:
42754046, Jun 23, 1981
Filed:
Oct 5, 1979
Appl. No.:
6/082007
Inventors:
Daniel R. Cassiday - Martinsville NJ
Vassilis G. Keramidas - Warren NJ
Ronald J. Roedel - Martinsville NJ
Robert H. Saul - Scotch Plains NJ
Assignee:
Bell Telephone Laboratories, Incorporated - Murray Hill NJ
International Classification:
H01L 3112
US Classification:
357 19
Abstract:
A monolithic opto-isolator is fabricated on an insulating substrate by using a graded bandgap semiconductor material for the LED and photodetector and spacing the LED from the photodetector with insulating channels.

Lpe Growth On Group Iii-V Compound Semiconductor Substrates Containing Phosphorus

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US Patent:
45003670, Feb 19, 1985
Filed:
Oct 31, 1983
Appl. No.:
6/547333
Inventors:
Vassilis G. Keramidas - Warren NJ
Jose A. Lourenco - Union NJ
Assignee:
AT&T Bell Laboratories - Murray Hill NJ
International Classification:
H01L 21208
US Classification:
148171
Abstract:
Liquid phase epitaxy (LPE) growth of a Group III-V semiconductor compound layer upon a Group III-V semiconductor compound substrate containing phosphorus is accomplished in a graphite meltholder by heating the substrate in an atmosphere of nitrogen or helium and contacting the substrate with a liquid melt, capable of growing the layer, in an atmosphere of hydrogen.

Monitoring Indium Phosphide Surface Composition In The Manufacture Of Iii-V

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US Patent:
43436749, Aug 10, 1982
Filed:
Mar 16, 1981
Appl. No.:
6/244130
Inventors:
Bulusu V. Dutt - Parsippany NJ
Vassilis G. Keramidas - Warren NJ
Henryk Temkin - New Providence NJ
Assignee:
Bell Telephone Laboratories, Incorporated - Murray Hill NJ
International Classification:
C30B 1910
US Classification:
156601
Abstract:
Indium phosphide stoichiometry in III-V semiconductor devices is sensitive to processing conditions during liquid phase epitaxy deposition. Disclosed is a method for determining indium-to-phosphorus ratio in an n-type indium phosphide semiconductor surface layer by monitoring photoluminescence at an absorption band at or near 0. 99 electron volt.
Vassilis G Keramidas from Warren, NJ, age ~86 Get Report