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Valery V Felmetsger

from Goleta, CA
Age ~70
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Also known as:
Valeri V Felmetsger, Viktoria Felmetsger, Valeri V Felmetsguer, Valeri G
Phone and address:
246 Forest Dr, Santa Barbara, CA 93117
(805) 685-2044
Related to:
Larissa G Felmetsger, 69Viktoria V Felmetsger, 46
Connected to:
Michael A Felmey, 38Kevin S Felmlee, 53Margaret R Felmlee, 53Aiesha L Felo, 36Laurie A Felo, 60Longji Felock, 38Nancy J Felock, 67Ann E Feloney, 67Michael P Feloney, 52Melinda D Felong, 37

Valery Felmetsger Phones & Addresses

  • 246 Forest Dr, Goleta, CA 93117 (805) 685-2044
  • 200 Old Mill Rd, Santa Barbara, CA 93110
  • 207 Arapaho St, Ventura, CA 93001
  • 246 Forest Dr, Goleta, CA 93117

Resumes

Resumes

Valery Felmetsger Photo 1

Pvd Process Development Manager At Oem Group, Inc

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Location:
2120 west Guadalupe Rd, Gilbert, AZ 85233
Industry:
Semiconductors
Work:
Oem Group, Inc.
Pvd Process Development Manager at Oem Group, Inc
Tegal Corporation Aug 2002 - Mar 2010
Pvd Process Development Manager
Sputtered Films Inc Jan 2002 - Aug 2002
Pvd Process Development Manager
Sputtered Films Inc Jan 2000 - Jan 2002
Senior Scientist
Sputtered Films Inc Nov 1997 - Jan 2000
Process Development Engineer
Education:
Institute of High - Current Electronics (Tomsk, Russia) 1984 - 1989
Doctorates, Doctor of Philosophy, Philosophy Ryzan Radio Engineering Academy 1972 - 1977
Master of Science, Masters
Skills:
Engineering Management
Semiconductors
Semiconductor Industry
Process Simulation
Pvd
Thin Films
Metrology
Failure Analysis
Design of Experiments
Photolithography
Cvd
Spc
Silicon
Ic
Mems
R&D
Plasma Etch
Electronics
Characterization
Nanotechnology
Cmos
Pecvd
Labview
Etching
Valery Felmetsger Photo 2

Valery Felmetsger

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Location:
Goleta, CA
Valery Felmetsger Photo 3

Institute Of High-Current

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Location:
Goleta, CA
Work:

Institute of High-Current

Publications

Us Patents

Permanent Adherence Of The Back End Of A Wafer To An Electrical Component Or Sub-Assembly

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US Patent:
7208396, Apr 24, 2007
Filed:
Jan 16, 2002
Appl. No.:
10/051886
Inventors:
Valery V. Felmetsger - Goleta CA, US
Assignee:
Tegal Corporation - Petaluma CA
International Classification:
H01L 21/20
US Classification:
438504, 438505, 438735, 438798
Abstract:
A plurality of successive layers are firmly adhered to one another and to a wafer surface and an electrical component or sub-assembly even when the wafer surface is not even and the layers are bent. The wafer surface is initially cleaned by an ion bombardment of an inert gas (e. g. argon) on the wafer surface in an RF discharge at a relatively high gas pressure. The wafer surface is then provided with a microscopic roughness by applying a low power so that the inert gas (e. g. argon) ions do not have sufficient energy to etch the surface. A layer of chromium is then sputter deposited on the wafer surface as by a DC magnetron with an intrinsic tensile stress and low gas entrapment by passing a minimal amount of the inert gas through the magnetron and by applying no RF bias to the wafer. The chromium layer is atomically bonded to the microscopically rough wafer surface. A layer of a nickel-vanadium alloy is deposited on the chromium layer and a layer of a metal selected from the group consisting of gold, silver and copper is deposited on the nickel-vanadium layer.

Sputter Deposition Of Cermet Resistor Films With Low Temperature Coefficient Of Resistance

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US Patent:
8482375, Jul 9, 2013
Filed:
May 24, 2010
Appl. No.:
12/786238
Inventors:
Valery V. Felmetsger - Goleta CA, US
Assignee:
OEM Group, Inc. - Gilbert AZ
International Classification:
H01C 1/012
US Classification:
338308
Abstract:
A solution for producing nanoscale thickness resistor films with sheet resistances above 1000Ω/□ (ohm per square) and low temperature coefficients of resistance (TCR) from −50 ppm/ C. to near zero is disclosed. In a preferred embodiment, a silicon-chromium based compound material (cermet) is sputter deposited onto a substrate at elevated temperature with applied rf substrate bias. The substrate is then exposed to a process including exposure to a first in-situ anneal under vacuum, followed by exposure to air, and followed then by exposure to a second anneal under vacuum. This approach results in films that have thermally stable resistance properties and desirable TCR characteristics.

Reactive Sputtering Of Silicon Nitride Films By Rf Supported Dc Magnetron

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US Patent:
20040231972, Nov 25, 2004
Filed:
May 23, 2003
Appl. No.:
10/446005
Inventors:
Pavel Laptev - Santa Barbara CA, US
Valery Felmetsger - Ventura CA, US
International Classification:
C23C014/32
US Classification:
204/192120, 204/298170, 204/298180, 204/298080
Abstract:
An asymmetric alternating voltage (preferably 40 KHz) is provided between a pair of targets having a coaxial (preferably frusto-conical) relationship to (1) deposit the material in a uniform thickness on the substrate surface (2) eliminate dielectric material from the surfaces of the targets and other components (3) provide a single ignition of the targets and eliminate target ignitions thereafter and (4) reduce the substrate temperature by using low energy (“cold”) electrons from a plasma discharge to produce a low energy current. The asymmetry may result from amplitude differences between the voltage in alternate half cycles and the voltage in the other half cycles. A second alternating voltage (preferably radio frequency) modulates the asymmetric alternating voltage to provide the smooth plasma ignition. The different voltage amplitudes applied to each of the targets are also instrumental in providing for a substantially constant deposition thickness at the different positions on the surface of the substrate.

High-Adhesive Backside Metallization

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US Patent:
20080083611, Apr 10, 2008
Filed:
Sep 27, 2007
Appl. No.:
11/863046
Inventors:
Valery Felmetsger - Goleta CA, US
Assignee:
TEGAL CORPORATION - Petaluma CA
International Classification:
C23C 14/35
US Classification:
20419215, 20419211
Abstract:
High-adhesive backside metallization may be realized when Ti is deposited with relatively low rf substrate bias power without pre-deposition rf plasma etch of the wafer. Rf induced bias voltage in the range of −50 V to −250 V ensured the best adhesion property of the film stack. Analysis of the interface between Ti layer and Si substrate have shown that Si diffused into Ti layer on a distance up to a depth of 10 nm, while Ti atoms penetrated about 2 nm into the Si. Hence Ti deposition with rf substrate bias enhances intermixing between Ti and Si atoms by low-energy ion bombardment without accumulation of Ar atoms in the interface area as it is inherent to metallization with pre-deposition rf plasma etch.

Stress Adjustment In Reactive Sputtering

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US Patent:
20090242388, Oct 1, 2009
Filed:
Mar 25, 2009
Appl. No.:
12/411357
Inventors:
Pavel N. LAPTEV - Ventura CA, US
Valery FELMETSGER - Goleta CA, US
Assignee:
TEGAL CORPORATION - Petaluma CA
International Classification:
C23C 14/00
US Classification:
20419212
Abstract:
In a dual cathode magnetron, an adjustment circuit is provided between a pair of sputter targets having a coaxial (preferably frusto-conical) relationship to modify the distribution of ion and electron currents flowing from the plasma discharge to a substrate residing within a sputter chamber. A stress adjustment circuit is used to modify the ion bombardment of the growing films on the substrate resulting in a mechanism for control of the stress in the deposited films. In a preferred embodiment, the adjustment circuit comprises a variable resistor disposed between an internal shield that acts as a passive anode and a target. The value of the variable resistor influences the plasma discharge current distribution between the split sputter targets and the internal shields, and can effectively be used to adjust the properties of the deposited films.

Stress Adjustment In Reactive Sputtering

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US Patent:
20090242392, Oct 1, 2009
Filed:
Mar 25, 2009
Appl. No.:
12/411301
Inventors:
Pavel N. Laptev - Ventura CA, US
Valery Felmetsger - Goleta CA, US
Assignee:
Tegal Corporation - Petaluma CA
International Classification:
C23C 14/40
US Classification:
20429808
Abstract:
In a dual cathode magnetron, an adjustment circuit is provided between a pair of sputter targets having a coaxial (preferably frusto-conical) relationship to modify the distribution of ion and electron currents flowing from the plasma discharge to a substrate residing within a sputter chamber. A stress adjustment circuit is used to modify the ion bombardment of the growing films on the substrate resulting in a mechanism for control of the stress in the deposited films. In a preferred embodiment, the adjustment circuit comprises a variable resistor disposed between an internal shield that acts as a passive anode and a target. The value of the variable resistor influences the plasma discharge current distribution between the split sputter targets and the internal shields, and can effectively be used to adjust the properties of the deposited films.

Control Of Crystal Orientation And Stress In Sputter Deposited Thin Films

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US Patent:
20090246385, Oct 1, 2009
Filed:
Mar 25, 2009
Appl. No.:
12/411369
Inventors:
Valery FELMETSGER - Goleta CA, US
Pavel N. LAPTEV - Ventura CA, US
Assignee:
TEGAL CORPORATION - Petaluma CA
International Classification:
B05D 3/14
C23C 14/34
B05D 5/00
US Classification:
427301, 20419217, 20419218, 427402
Abstract:
A two step thin film deposition process is disclosed to provide for the simultaneous achievement of controlled stress and the achievement of preferred crystalline orientation in sputter-deposited thin films. In a preferred embodiment, a first relatively short deposition step is performed without substrate bias to establish the crystalline orientation of the deposited film followed by a second, typically relatively longer deposition step with an applied rf bias to provide for low or no stress conditions in the growing film. Sputter deposition without substrate bias has been found to provide good crystal orientation and can be influenced through the crystalline orientation of the underlying layers and through the introduction of intentionally oriented seed layers to promote preferred crystalline orientation. Conversely, sputter deposition with substrate bias has been found to provide a means for producing stress control in growing films.
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Valery V Felmetsger from Goleta, CA, age ~70 Get Report