Resumes
Resumes

Staff Engineer At Tabula
View pageLocation:
3012 University Ave, Grand Forks, ND 58203
Industry:
Semiconductors
Work:
Tabula
Staff Engineer at Tabula
Xilinx Aug 2006 - Jul 2013
Design Engineering Manager
Cmc Ltd Apr 2004 - Aug 2006
Senior Design Engineer
Iflect Technologies Pvt Ltd Jul 2001 - Apr 2004
Design Engineer
Staff Engineer at Tabula
Xilinx Aug 2006 - Jul 2013
Design Engineering Manager
Cmc Ltd Apr 2004 - Aug 2006
Senior Design Engineer
Iflect Technologies Pvt Ltd Jul 2001 - Apr 2004
Design Engineer
Education:
D.y.patil College of Engineering 2000 - 2000
Bachelor of Engineering, Bachelors, Electronics
Bachelor of Engineering, Bachelors, Electronics
Skills:
Verilog
Fpga
Rtl Design
Xilinx
Embedded Systems
Hardware Architecture
Vhdl
Eda
Soc
Tcl
Asic
Vlsi
Algorithms
Processors
Timing Closure
Field Programmable Gate Arrays
Very Large Scale Integration
Systemverilog
Application Specific Integrated Circuits
Fpga
Rtl Design
Xilinx
Embedded Systems
Hardware Architecture
Vhdl
Eda
Soc
Tcl
Asic
Vlsi
Algorithms
Processors
Timing Closure
Field Programmable Gate Arrays
Very Large Scale Integration
Systemverilog
Application Specific Integrated Circuits
