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Usha Kankanala

from Menlo Park, CA
Age ~40
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Connected to:
Vinay R Kankanala, 36Venu G Kankani, 43Manish Kankaria, 45Pankaj Kankaria, 48Steven Kanke, 60Kaelie Kankel, 34Sandhya Kankipati, 43Swaraj V Kankipati, 47Antti M Kankkunen, 58Dana A Kankolenski, 60

Usha Kankanala Phones & Addresses

  • 361 Marmona Dr, Menlo Park, CA 94025
  • Fremont, CA
  • Santa Clara, CA
  • Sunnyvale, CA
  • Madison, WI
  • Union City, CA
  • San Jose, CA

Work

Company: Intel corporation Jan 2016 to Sep 2016 Position: Soc design engineer

Education

School / High School: Stanford University 2018 to 2019

Skills

Fpga • Microprocessors • Verilog • Characterization • Asic • Semiconductors • Soc • Systemverilog • Computer Architecture • Circuit Design • Simulations • Rtl Design • Static Timing Analysis • C • Place and Route • Synthesis • Cmos

Languages

English

Interests

Education

Industries

Semiconductors

Resumes

Resumes

Usha Kankanala Photo 1

Member Of Technical Staff

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Location:
Menlo Park, CA
Industry:
Semiconductors
Work:
Intel Corporation Jan 2016 - Sep 2016
Soc Design Engineer
Apple Jan 2016 - Sep 2016
Cpu Design Engineer
Intel Corporation Apr 2012 - Dec 2015
Senior Component Design Engineer
Intel Corporation Jan 2009 - Mar 2012
Component Design Engineer
University of Wisconsin-Madison Jan 2008 - Dec 2008
Research Assistant
Education:
Stanford University 2018 - 2019
Stanford University 2015 - 2016
University of Wisconsin - Madison 2006 - 2008
Master of Science, Masters, Electrical Engineering
Skills:
Fpga
Microprocessors
Verilog
Characterization
Asic
Semiconductors
Soc
Systemverilog
Computer Architecture
Circuit Design
Simulations
Rtl Design
Static Timing Analysis
C
Place and Route
Synthesis
Cmos
Interests:
Education
Languages:
English
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Usha Kankanala from Menlo Park, CA, age ~40 Get Report