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Todd R Strope

from Tulsa, OK
Age ~60
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Also known as:
Todd Ray Strope, Todd R Trope, Todd R Strop
Related to:
Sara R Gaither, 50Doug CJoshua Lay, 32Kimberly D Spencer, 54
Connected to:
Andrew J Strope, 47Ashley A Strope, 38Jamie L Strope, 41Lisa-Marie Strope, 44Melissa A Strope, 48Michael M Strope, 54Jack W Stropes, 97Ruth M Stropes, 62Billie Stropkai, 57Michael P Stropkay, 53

Todd Strope Phones & Addresses

  • Tulsa, OK
  • Longmont, CO
  • 11720 Silver Sun Dr, Oklahoma City, OK 73162
  • Muskogee, OK
  • Memphis, TN
  • Largo, FL

Resumes

Resumes

Todd Strope Photo 1

Principal Development Engineer At Seagate Technology

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Location:
Greater Denver Area
Industry:
Computer Hardware
Experience:
Seagate Technology (Public Company; 10,001 or more employees; STX; Computer Hardware industry): Principal Development Engineer,  (August 1999-Present) Electrical Architecture for 3.5", 2.5", & 1.8" Hard Disc Drives & Solid State Drives.Pulsecom (Public Company;...
Todd Strope Photo 2

Todd Strope

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Publications

Us Patents

Encoding And Decoding To Reduce Switching Of Flash Memory Transistors

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US Patent:
7961520, Jun 14, 2011
Filed:
Aug 18, 2009
Appl. No.:
12/543044
Inventors:
Todd Ray Strope - Longmont CO, US
Assignee:
Seagate Technology LLC - Scotts Valley CA
International Classification:
G11C 16/04
US Classification:
3651852, 36518527
Abstract:
Methods of encoding data to and decoding data from flash memory devices are provided. User data having an unknown ratio of 1's to 0's is received. The user data is utilized in generating transformed data that has a predictable ratio of 1's to 0's. The transformed data is stored to flash memory. The transformed data is illustratively generate by either applying an “exclusive or” function to the user data or by converting the user data into a number having a greater number of bits.

Defragmentation Of Solid State Memory

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US Patent:
8190811, May 29, 2012
Filed:
Jun 9, 2009
Appl. No.:
12/480935
Inventors:
John Edward Moon - Superior CO, US
Todd Ray Strope - Longmont CO, US
Assignee:
Seagate Technology, LLC - Cupertino CA
International Classification:
G06F 13/00
US Classification:
711103, 711165, 711E12009
Abstract:
A data storage device includes a solid state data storage medium, a set of related data blocks and a controller. The set of related data blocks are non-contiguously stored on the data storage medium and have an original write sequence. The controller, responsive to a defragmentation request, maps the physical block addresses of the set of related data blocks to contiguous logical block addresses in the original write sequence while maintaining the non-contiguous physical block addresses of the set of related data blocks on the data storage medium.

Systems And Methods For Storing Data In A Multi-Level Cell Solid State Storage Device

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US Patent:
8402203, Mar 19, 2013
Filed:
Dec 31, 2009
Appl. No.:
12/650712
Inventors:
Todd Ray Strope - Longmont CO, US
Assignee:
Seagate Technology LLC - Cupertino CA
International Classification:
G06F 12/00
US Classification:
711103, 711E12008
Abstract:
This disclosure is related to systems and methods for storing data in multi-level cell solid state storage devices, such as Flash memory devices. In one example, a multi-level cell memory array has programmable pages, a first page having a first programming time, and a second page having a second programming time that is different than the first programming time. In one embodiment, the first programming time is faster than the second programming time. Further, a controller coupled to the multi-level cell memory array may be configured to select the first page to store the data when a priority level of a write operation indicates a first priority level and select the second page to store the data when the priority level indicates a second priority level.

Encoding And Decoding To Reduce Switching Of Flash Memory Transistors

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US Patent:
8581754, Nov 12, 2013
Filed:
Jun 14, 2011
Appl. No.:
13/160055
Inventors:
Todd Ray Strope - Longmont CO, US
Assignee:
Seagate Technology LLC - Cupertino CA
International Classification:
H03M 5/00
US Classification:
341 58, 36518909, 36518521, 36518522, 36518905, 36518907, 713189, 713193, 711103, 711137, 711154, 711168, 711E12001
Abstract:
Methods of encoding data to and decoding data from flash memory devices are provided. User data having an unknown ratio of 1's to 0's is received. The user data is utilized in generating transformed data that has a predictable ratio of 1's to 0's. The transformed data is stored to flash memory. The transformed data is illustratively generate by either applying an “exclusive or” function to the user data or by converting the user data into a number having a greater number of bits.

System And Method Of Matching Data Rates

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US Patent:
20090094389, Apr 9, 2009
Filed:
Oct 9, 2007
Appl. No.:
11/869345
Inventors:
Stanton MacDonough Keeler - Longmont CO, US
Todd Strope - Longmont CO, US
Assignee:
SEAGATE TECHNOLOGY, LLC - Scotts Valley CA
International Classification:
G06F 13/18
US Classification:
710 33
Abstract:
The present disclosure is directed to systems and methods of matching data rates. In a particular embodiment, a device includes a first data bus and a controller having a first output coupled to the first data bus to provide data to the first data bus. The device also includes a first memory of a first type coupled to the first data bus. The first memory may have a first input to receive data from the controller via the first data bus. The device also includes logic coupled to the first data bus. The logic may have a second input coupled to the first data bus to receive data from the controller via the first data bus. The device may also include a second data bus coupled to the logic. The logic may have a second output coupled to the second data bus to provide data to the second data bus. The logic may also include a second memory of a second type coupled to the second data bus. The second memory may have a third input to selectively receive data from the logic via the second data bus. The logic may be adapted to receive data and select the first memory or the second memory to store data.

Storage Device And Controller To Selectively Activate A Storage Media

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US Patent:
20100158486, Jun 24, 2010
Filed:
Dec 19, 2008
Appl. No.:
12/339311
Inventors:
John Edward Moon - Superior CO, US
Robert Dale Murphy - Boulder CO, US
Paul Francis Kusbel - Longmont CO, US
Todd Ray Strope - Longmont CO, US
Preston Donald Sellers - Broomfield CO, US
Assignee:
Seagate Technology LLC - Scotts Valley CA
International Classification:
H04N 7/26
H04N 5/91
US Classification:
386124, 386 46, 386E05001
Abstract:
In a particular embodiment, a system includes a controller adapted to determine a data transfer rate associated with at least one data stream to be written to a storage media and to selectively activate at least one of a first memory and a second memory based on the data transfer rate to record the at least one data stream.

Systems And Methods For Storing Data In A Multi-Level Cell Solid State Storage Device

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US Patent:
20130151764, Jun 13, 2013
Filed:
Feb 11, 2013
Appl. No.:
13/763945
Inventors:
Seagate Technology LLC - Cupertino CA, US
Todd Ray Strope - Longmont CO, US
Assignee:
SEAGATE TECHNOLOGY LLC - Cupertino CA
International Classification:
G06F 12/02
US Classification:
711103
Abstract:
This disclosure is related to systems and methods for storing data in multi-level cell solid state storage devices, such as Flash memory devices. In one example, a multi-level cell memory array has programmable pages, a first page having a first programming time, and a second page having a second programming time that is different than the first programming time. In one embodiment, the first programming time is faster than the to second programming time. Further, a controller coupled to the multi-level cell memory array may be configured to select the first page to store the data when a priority level of a write operation indicates a first priority level and select the second page to store the data when the priority level indicates a second priority level.

Method And Apparatus For Cleaning Ophthalmic Lenses And Blocks

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US Patent:
61092762, Aug 29, 2000
Filed:
Nov 24, 1999
Appl. No.:
9/449216
Inventors:
Kenneth L. Smith - Porum OK
Todd R. Strope - Tulsa OK
Assignee:
Coburn Optical Industries, Inc. - Tulsa OK
International Classification:
B08B 310
US Classification:
134 13
Abstract:
A process and machine for cleaning ophthalmic lenses and blocks heats a washing solution in a wash tank and a rinsing solution in a rinse tank to approximately 140. degree. F. Ultrasonic wave agitation is then initiated in the solutions. A set of lenses or blocks is immersed in the ultrasonically agitated washing solution for approximately one-half the predetermined time of the wash cycle. Mechanical agitation of the immersed set of lenses or blocks is initiated in the ultrasonically agitated washing solution for the remainder of the predetermined time of the wash cycle. The set of lenses or blocks is then raised above the washing solution for a predetermined drip period. The set of lenses or blocks is then immersed in the ultrasonically agitated rinsing solution for approximately one-half the predetermined time of the rinse cycle. Mechanical agitation of the immersed set of lenses or blocks is initiated in the ultrasonically agitated rinsing solution for the remainder of the predetermined time of the rinse cycle. The set of lenses or blocks is then raised above the rinsing solution for a predetermined drip period.
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Todd R Strope from Tulsa, OK, age ~60 Get Report