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Stewart G Speed

from San Jose, CA
Age ~54

Stewart Speed Phones & Addresses

  • 1203 Greenbriar Ave, San Jose, CA 95128 (408) 423-8470
  • 250 Santa Fe Ter, Sunnyvale, CA 94085 (408) 523-1279 (408) 723-1279
  • 718 Old San Francisco Rd, Sunnyvale, CA 94086 (408) 523-1279
  • Santa Clara, CA
  • 250 Santa Fe Ter APT 114, Sunnyvale, CA 94085 (408) 515-2121

Work

Position: Service Occupations

Education

Degree: High school graduate or higher

Resumes

Resumes

Stewart Speed Photo 1

Senior Account Executive

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Location:
Sunnyvale, CA
Industry:
Semiconductors
Work:
Fungible, Inc.
Senior Account Executive

Stmicroelectronics Nov 2016 - May 2019
Account Executive Manager

Idt - Integrated Device Technology, Inc. Oct 2015 - Nov 2016
Regional Sales Manager

Broadcom Feb 2012 - Sep 2015
Sr, Account Manager - Cisco

Netlogic Feb 2010 - Feb 2012
Sales Manager - Cisco
Education:
Liverpool John Moores University 1992 - 1995
Bachelors, Bachelor of Science In Electrical Engineering, Electronics Engineering
Skills:
Semiconductors
Ic
Asic
Embedded Systems
Product Marketing
Analog
Semiconductor Industry
Cisco Technologies
Application Specific Integrated Circuits
Integrated Circuits
Soc
System on A Chip
Product Management
Processors
Mixed Signal
Cross Functional Team Leadership
Product Development
Go To Market Strategy
Wireless
Electronics
Stewart Speed Photo 2

Stewart Speed

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Location:
Sunnyvale, CA
Stewart Speed Photo 3

Stewart Speed

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Publications

Us Patents

Integrated Ddr/Sdr Flow Control Managers That Support Multiple Queues And Mux, Demux And Broadcast Operating Modes

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US Patent:
7082071, Jul 25, 2006
Filed:
Jun 30, 2004
Appl. No.:
10/881022
Inventors:
Roland T. Knaack - Duluth GA, US
David Stuart Gibson - Suwanee GA, US
Mario Montana - Los Gatos CA, US
Mario Au - Fremont CA, US
Stewart Speed - Sunnyvale CA, US
Srinivas Satish Babu Bamdhamravuri - Duluth GA, US
Uksong Kang - Duluth GA, US
Assignee:
Integrated Device Technology, Inc. - San Jose CA
International Classification:
G11C 7/00
US Classification:
365221, 365191, 365233
Abstract:
An integrated circuit chip includes a plurality of independent FIFO memory devices that are each configured to support all four combinations of DDR and SDR write modes and DDR and SDR read modes and collectively configured to support all four multiplexer, demultiplexer, broadcast and multi-Q operating modes.
Stewart G Speed from San Jose, CA, age ~54 Get Report