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Steven Melendez Phones & Addresses

  • 5225 Wellington Park Cir, Orlando, FL 32839 (407) 271-4066
  • 6382 Southbridge St, Windermere, FL 34786 (407) 347-7178
  • Carbondale, IL
  • Schaumburg, IL
  • 1304 Whytecliff Rd, Palatine, IL 60067 (847) 358-1405
  • Orange Pk, FL
  • Prospect Heights, IL

Resumes

Resumes

Steven Melendez Photo 1

Senior Electrical Engineer

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Location:
6382 Southbridge St, Windermere, FL 34786
Industry:
Defense & Space
Work:
Lockheed Martin
Senior Electrical Engineer
Education:
Southern Illinois University, Carbondale 2003 - 2005
Master of Science, Masters, Computer Engineering
Southern Illinois University, Carbondale 1998 - 2003
Bachelors, Bachelor of Science, Computer Engineering, Electronics Engineering
Steven Melendez Photo 2

Waiter

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Location:
Orlando, FL
Work:
Jimmy Hula
Waiter
Steven Melendez Photo 3

Steven Melendez

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Location:
Orlando, FL
Steven Melendez Photo 4

Steven Melendez

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Steven Melendez Photo 5

Steven Melendez

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Steven Melendez Photo 6

Steven Melendez

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Steven Melendez Photo 7

Steven Melendez

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Location:
United States
Steven Melendez Photo 8

Steven Melendez

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Publications

Wikipedia

Steven C. Melendez

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Steven Cuitlahuac Melendez is the second son of famed Peanuts animator Bill Melndez. He was born in Los Angeles where he gained his early experience in film

Us Patents

Apparatus And Method Emulating A Parallel Interface To Effect Parallel Data Transfer From Serial Flash Memory

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US Patent:
20130282945, Oct 24, 2013
Filed:
Apr 19, 2013
Appl. No.:
13/866128
Inventors:
CARTER BURKS - ORLANDO FL, US
STEVEN J. MELENDEZ - WINDERMERE FL, US
Assignee:
Lockheed Martin Corporation - Bethesda MD
International Classification:
G06F 13/40
US Classification:
710305
Abstract:
Apparatus and method emulating a parallel interface to effect parallel data transfer from serial flash memory are provided. A field-programmable gate array (FPGA) may be coupled to a processor via a data bus. A serial flash memory may be coupled to the FPGA via a serial interface. The FPGA may be programmed to emulate a parallel interface by converting a serial data stream of boot code or operating software received from the serial flash memory to a parallel data stream to effect parallel data transfer over the data bus to the processor. The FPGA may be responsive to respective logic signals set by the processor to start access to the serial flash memory by pointing to at least one predefined location corresponding to at least one starting address of data to be transferred to the processor without using a plurality of address lines to access the serial flash memory.
Steven J Melendez from Orlando, FL, age ~44 Get Report