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Steven Robert Kahermanes

from Eagle, ID
Age ~70
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Also known as:
Steven R Kahermanes, Steven Te Kahermanes, Steve R Kahermanes, Steven Rober, Sarah Kahermanes
Related to:
Thomas M Cruz, 88Lucy R Cruz, 58Janice CruzBrandon Cruz, 50Shana Baradar, 53Baradar Cruz, 73
Connected to:
Nadia Kahf, 52Jarmaine K Kahihikolo, 56Lorenza Kahihikolo, 56Rebecca L Kahikina, 42Adel G Kahil, 60Ali Kahil, 29Jukka O Kahilainen, 76Stacey L Kahill, 53Wilda J Kahill, 61Audrey R Kahin, 89

Steven Kahermanes Phones & Addresses

  • Eagle, ID
  • 3576 Woodley Dr, San Jose, CA 95148 (408) 270-1159
  • Santa Clara, CA
  • 3576 Woodley Dr, San Jose, CA 95148 (408) 421-6270

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Publications

Us Patents

Preset Circuit For Information Storage Devices

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US Patent:
43262708, Apr 20, 1982
Filed:
Jul 19, 1979
Appl. No.:
6/058638
Inventors:
William K. Owens - Sunnyvale CA
Steven R. Kahermanes - San Jose CA
Assignee:
Fairchild Camera and Instrument Corp. - Mountain View CA
International Classification:
G11C 1140
US Classification:
365218
Abstract:
An electronic circuit for simultaneously erasing all the information stored in an electronic information storage device and entering a predetermined new pattern of information into the storage device comprises a plurality of bistable semiconductor cells with an additional transistor current-conducting region included on a predetermined side of each cell. The additional current-conducting regions in the cells along each word row are coupled to an additional word line which connects to a current switch for the row. At an appropriate pulse signal, the current switch activates to switch row current temporarily from the standard current-source word line, which conducts holding current to the row during normal operation, to the additional word line, thereby erasing the old data and entering the new information bits.

Preset Circuit For Information Storage Devices

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US Patent:
41722914, Oct 23, 1979
Filed:
Aug 7, 1978
Appl. No.:
5/931637
Inventors:
William K. Owens - Sunnyvale CA
Steven R. Kahermanes - San Jose CA
Assignee:
Fairchild Camera and Instrument Corp. - Mt. View CA
International Classification:
G11C 1140
G11C 1126
US Classification:
365218
Abstract:
An electronic circuit for simultaneously erasing all the information stored in an electronic information storage device and entering a predetermined new pattern of information into the storage device contains one or more of bistable semiconductor cells with an additional transistor current-conducting region included on a predetermined side of each cell. The additional current-conducting regions in the cells along each word row are coupled to an additional word line which connects to a current switch for the row. At an appropriate pulse signal, the current switch activates to switch row current temporarily from the standard current-source word line, which conducts holding current to the row during normal operation, to the additional word line, thereby erasing the old data and entering the new information.
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Steven Robert Kahermanes from Eagle, ID, age ~70 Get Report