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Simon H Kahan

from Seattle, WA
Age ~61
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Also known as:
Simon Joan Kahan, Simon H Kaaha, Simon H Lawry, Simon K Lawry, Aahan K Simon, Simon Y
Phone and address:
2415 E Roanoke St, Seattle, WA 98112
Related to:
Ronald J Hempel, 76Adrienne Kahan, 31Claire M LawryWilliam F LawryJoan T Lawry, 66Eleanor J Lawry, 100Daniel R Hansen, 44Daniel R Hansen, 51
Connected to:
Allen Kahan, 75Ashley J Kahan, 35Barbara L Kahan, 82Channie G Kahan, 59Dolores C Kahan, 76Elisha Kahan, 34Gabriel Kahan, 44Ilyce H Kahan, 62Irene Kahan, 61Jonah Kahan, 33

Simon Kahan Phones & Addresses

  • 2415 E Roanoke St, Seattle, WA 98112
  • 2215 Mcgraw St, Seattle, WA 98112

Resumes

Resumes

Simon Kahan Photo 1

Vehicle Technician

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Location:
Seattle, WA
Industry:
Automotive
Work:
Cultivated Meat Modeling Consortium
Founder
Institute For Systems Biology
Affiliate Faculty
Biocellion Spc
President
Pacific Northwest National Laboratory Apr 2010 - Sep 2013
Senior Research Scientist
University of Washington Apr 2010 - Sep 2013
Affiliate Faculty
Education:
Seattle University 2010 - 2012
Masters, Master of Arts University of Washington 1986 - 1991
Doctorates, Doctor of Philosophy, Computer Science University of California, Berkeley 1984 - 1985
Master of Science, Masters, Electrical Engineering Southborough Secondary School, Surbiton, 1971 - 1976
Skills:
Parallel Computing
Technical Marketing
Software
Distributed Systems
Machine Learning
Software Engineering
High Performance Computing
C++
Computer Science
Algorithms
C
Fortran
Computer Architecture
Parallel Programming
Scientific Computing
Latex
Mpi
Openmp
Multithreading
Artificial Intelligence
Software Development
C (Programming Language
Vehicles
Customer Satisfaction
Automotive Electronics
Continuous Improvement
Fault Resolution
Vehicle Dynamics
Automotive Engineering
Team Leadership
Automotive
Engineering
Automobile
Dfmea
Interests:
Children
Civil Rights and Social Action
Education
Environment
Poverty Alleviation
Disaster and Humanitarian Relief
Human Rights
Animal Welfare
Health
Languages:
English
Simon Kahan Photo 2

Simon Kahan

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Business Records

Name / Title
Company / Classification
Phones & Addresses
2415 E Roanoke St, Seattle, WA 98112
Simon Kahan
Owner, President
Cobegin
Computer Systems Design
2415 E Roanoke St, Seattle, WA 98112
(206) 322-3799

Publications

Us Patents

Synchronization Techniques In A Multithreaded Environment

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US Patent:
7117330, Oct 3, 2006
Filed:
Jun 12, 2003
Appl. No.:
10/461950
Inventors:
Gail A. Alverson - Seattle WA, US
Simon H. Kahan - Seattle WA, US
Brian D. Koblenz - Seattle WA, US
Allan Porterfield - Bellevue WA, US
Burton J. Smith - Seattle WA, US
Assignee:
Cray Inc. - Seattle WA
International Classification:
G06F 12/00
US Classification:
711163, 711210, 710260, 710266, 712244
Abstract:
Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.

Restricting Access To Memory In A Multithreaded Environment

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US Patent:
7165150, Jan 16, 2007
Filed:
Oct 30, 2003
Appl. No.:
10/697902
Inventors:
Gail A. Alverson - Seattle WA, US
Simon H. Kahan - Seattle WA, US
Brian D. Koblenz - Seattle WA, US
Allan Porterfield - Bellevue WA, US
Burton J. Smith - Seattle WA, US
Assignee:
Cray Inc. - Seattle WA
International Classification:
G06F 12/08
US Classification:
711145, 711163
Abstract:
Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.

Accessing A Collection Of Data Items In A Multithreaded Environment

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US Patent:
7558889, Jul 7, 2009
Filed:
Oct 30, 2003
Appl. No.:
10/697890
Inventors:
Gail A. Alverson - Seattle WA, US
Simon H. Kahan - Seattle WA, US
Brian D. Koblenz - Seattle WA, US
Allan Porterfield - Bellevue WA, US
Burton J. Smith - Seattle WA, US
Assignee:
Cray Inc. - Seattle WA
International Classification:
G06F 13/14
G06F 12/00
G06F 3/00
US Classification:
710 52, 710 56, 710 57, 718102
Abstract:
Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evalution of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of fowarding to avoid checking for an end of a buffer, use of sentinel work to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.

Detecting Access To A Memory Location In A Multithreaded Environment

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US Patent:
7558910, Jul 7, 2009
Filed:
Oct 30, 2003
Appl. No.:
10/697128
Inventors:
Gail A. Alverson - Seattle WA, US
Simon H. Kahan - Seattle WA, US
Brian D. Koblenz - Seattle WA, US
Allan Porterfield - Bellevue WA, US
Burton J. Smith - Seattle WA, US
Assignee:
Cray Inc. - Seattle WA
International Classification:
G06F 13/00
G06F 9/34
G06F 9/455
G06F 9/46
G06F 3/00
US Classification:
711110, 711100, 711145, 711203, 718 1, 718100, 718102, 718104, 710 36, 710 52, 710 54, 710 56
Abstract:
Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.

Method And System For Memory Allocation In A Multiprocessing Environment

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US Patent:
7624246, Nov 24, 2009
Filed:
Oct 20, 2006
Appl. No.:
11/584173
Inventors:
Petr Konecny - Seattle WA, US
Simon H. Kahan - Seattle WA, US
Assignee:
Cray Inc. - Seattle WA
International Classification:
G06F 12/00
G06F 13/00
G06F 13/28
G06F 9/46
US Classification:
711170, 711171, 718104
Abstract:
A method and system for allocating and de-allocating memory for threads of an application is provided. An allocation system provides a heap for tracking free tokens of memory that are available for allocation to threads of an application. A heap tracks collections of free tokens of the fixed token size. The allocation system receives memory requests from threads that specify an allocation type of allocate or de-allocate. When multiple memory requests are pending concurrently from multiple threads, then the allocation system attempts to combine memory requests of the same type and of the same token size that are received from different threads. One of the threads is responsible for updating the heap to effect the two memory requests. The allocation system combines multiple memory requests so that the heap need only be accessed once to allocate or de-allocate multiple tokens.

Identifying Connected Components Of A Graph In Parallel

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US Patent:
7764629, Jul 27, 2010
Filed:
Aug 11, 2005
Appl. No.:
11/201765
Inventors:
Simon H. Kahan - Seattle WA, US
Assignee:
Cray Inc. - Seattle WA
International Classification:
G06N 99/00
US Classification:
370255, 716 1, 716 4, 707E1711
Abstract:
A method and system for finding connected components of a graph using a parallel algorithm is provided. The connected nodes system performs a search algorithm in parallel to identify subgraphs of the graph in which the nodes of the subgraph are connected. The connected nodes system also identifies which subgraphs have at least one edge between their nodes. Thus, the connected nodes system effectively generates a hyper-graph with the subgraphs as hyper-nodes that are connected when subgraphs have at least one edge between their nodes. The connected nodes system may then perform a conventional connected component algorithm on the hyper-graph to identify the connected hyper-nodes, which effectively identifies the connected nodes of the underlying graphs.

Synchronization Techniques In A Multithreaded Environment

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US Patent:
7904685, Mar 8, 2011
Filed:
Jun 12, 2003
Appl. No.:
10/461979
Inventors:
Gail A. Alverson - Seattle WA, US
Simon H. Kahan - Seattle WA, US
Brian D. Koblenz - Seattle WA, US
Allan Porterfield - Bellevue WA, US
Burton J. Smith - Seattle WA, US
Assignee:
Cray Inc. - Seattle WA
International Classification:
G06F 12/00
G06F 13/00
G06F 13/28
US Classification:
711163, 711E12023, 719318
Abstract:
Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.

Methods And Systems For Scalable Computing On Commodity Hardware For Irregular Applications

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US Patent:
20140047452, Feb 13, 2014
Filed:
Mar 15, 2013
Appl. No.:
13/834560
Inventors:
Brandon HOLT - Seattle WA, US
Brandon MYERS - Seattle WA, US
Simon KAHAN - Seattle WA, US
Mark H. OSKIN - Seattle WA, US
Assignee:
Battelle Memorial Institute - Richland WA
University of Washington through its Center for Commercialization - Seattle WA
International Classification:
G06F 9/50
US Classification:
718104
Abstract:
A computing system for scalable computing on commodity hardware is provided. The computing system includes a first computing device communicatively connected to a second computing device. The first computing device includes a processor, a physical computer-readable medium, and program instructions stored on the physical computer-readable medium and executable by the processor to perform functions. The functions include determining a first task associated with the second computing device and a second task associated with the second computing device are to be executed, assigning execution of the first task and the second task to the processor of the first computing device, generating an aggregated message that includes (i) a first message including an indication corresponding to the execution of the first task and (ii) a second message including an indication corresponding to the execution of the second task, and sending the aggregated message to the second computing device.
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Simon H Kahan from Seattle, WA, age ~61 Get Report