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Shreyas S Kher

from Campbell, CA
Age ~64
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Also known as:
Sheryas S Kher, Shreya S Kher, Shieya Kher, Suresh Kher Shreyas, S Kher
Phone and address:
1656 Adrien Dr, Campbell, CA 95008
(408) 364-1802
Related to:
Varsha S Kher, 63Aditya Kher, 37Abhishek Kher, 30
Connected to:
Chirag L Kher, 35Kapil Kher, 45Rakesh M Kher, 51Ranjit B Kher, 49Satish D Kher, 56Vijay A Kher, 44Yogesh B Kher, 58Ankit Khera, 38Harish C Khera, 62Meenu Khera, 53

Shreyas Kher Phones & Addresses

  • 1656 Adrien Dr, Campbell, CA 95008 (408) 364-1802
  • 175 Calvert Dr, Cupertino, CA 95014
  • Durham, NC
  • Syracuse, NY
  • Santa Clara, CA
  • 1656 Adrien Dr, Campbell, CA 95008

Publications

Us Patents

System And Method For Forming A Gate Dielectric

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US Patent:
6858547, Feb 22, 2005
Filed:
Sep 27, 2002
Appl. No.:
10/256563
Inventors:
Craig R. Metzner - Fremont CA, US
Shreyas S. Kher - Campbell CA, US
Shixue Han - Milpitas CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L021/31
US Classification:
438785
Abstract:
A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydroflouric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NHin a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH, forming the stack after the pre-treating, and providing a flow of Nin a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming. The pre-treating includes providing an inert gas flow in a process zone surrounding the HF-last surface, reacting hydrogen with an oxidizer in the process zone for a very short duration, and providing an inert gas flew in the process zone after the reacting.

Ald Metal Oxide Deposition Process Using Direct Oxidation

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US Patent:
7067439, Jun 27, 2006
Filed:
Sep 19, 2002
Appl. No.:
10/247103
Inventors:
Craig R. Metzner - Fremont CA, US
Shreyas S. Kher - Campbell CA, US
Vidyut Gopal - Santa Clara CA, US
Shixue Han - Milpitas CA, US
Shankarram A. Athreya - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/31
US Classification:
438785, 257E21006, 42724919
Abstract:
Methods of forming metal compounds such as metal oxides or metal nitrides by sequentially introducing and then reacting metal organic compounds with ozone or with oxygen radicals or nitrogen radicals formed in a remote plasma chamber. The metal compounds have surprisingly and significantly improved uniformity when deposited by atomic layer deposition with cycle times of at least 10 seconds. The metal compounds also do not contain detectable carbon when the metal organic compound is vaporized at process conditions in the absence of solvents or excess ligands.

System And Method For Forming A Gate Dielectric

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US Patent:
7304004, Dec 4, 2007
Filed:
Aug 6, 2004
Appl. No.:
10/913941
Inventors:
Craig R. Metzner - Fremont CA, US
Shreyas S. Kher - Campbell CA, US
Shixue Han - Milpitas CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/31
US Classification:
438785, 257E21274, 257E21279, 257E21281, 257E2129
Abstract:
A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydroflouric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NHin a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH, forming the stack after the pre-treating, and providing a flow of Nin a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming. The pre-treating includes providing an inert gas flow in a process zone surrounding the HF-last surface, reacting hydrogen with an oxidizer in the process zone for a very short duration, and providing an inert gas flew in the process zone after the reacting.

System And Method For Forming A Gate Dielectric

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US Patent:
7531468, May 12, 2009
Filed:
Oct 30, 2007
Appl. No.:
11/929087
Inventors:
Craig R. Metzner - Fremont CA, US
Shreyas S. Kher - Campbell CA, US
Shixue Han - Milpitas CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/31
US Classification:
438785, 257E21274, 257E21279, 257E21281
Abstract:
A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydrofluoric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NHin a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH, forming the stack after the pre-treating, and providing a flow of Nin a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming. The pre-treating includes providing an inert gas flow in a process zone surrounding the HF-last surface, reacting hydrogen with an oxidizer in the process zone for a very short duration, and providing an inert gas flew in the process zone after the reacting.

Method For Hafnium Nitride Deposition

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US Patent:
7547952, Jun 16, 2009
Filed:
May 30, 2006
Appl. No.:
11/420928
Inventors:
Craig Metzner - Fremont CA, US
Shreyas Kher - Campbell CA, US
Yeong Kwan Kim - Pleasanton CA, US
M. Noel Rocklein - Boulder CO, US
Steven M. George - Boulder CO, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 29/72
H01L 21/3205
H01L 21/4763
H01L 21/31
H01L 21/469
H01L 21/10
H01L 21/26
US Classification:
257411, 257410, 438590, 438763, 438785, 438786, 438493
Abstract:
The present invention generally is a method for forming a high-k dielectric layer, comprising depositing a hafnium compound by atomic layer deposition to a substrate, comprising, delivering a hafnium precursor to a surface of the substrate, reacting the hafnium precursor and forming a hafnium containing layer to the surface, delivering a nitrogen precursor to the hafnium containing layer, forming at least one hafnium nitrogen bond and depositing the hafnium compound to the surface.

Ald Metal Oxide Deposition Process Using Direct Oxidation

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US Patent:
7569500, Aug 4, 2009
Filed:
May 31, 2006
Appl. No.:
11/421283
Inventors:
Craig R. Metzner - Fremont CA, US
Shreyas S. Kher - Campbell CA, US
Vidyut Gopal - Santa Clara CA, US
Shixue Han - Milpitas CA, US
Shankarram A. Athreya - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/31
US Classification:
438785, 257E21006, 42724919
Abstract:
Methods of forming metal compounds such as metal oxides or metal nitrides by sequentially introducing and then reacting metal organic compounds with ozone one or with oxygen radicals or nitrogen radicals formed in a remote plasma chamber. The metal compounds have surprisingly and significantly improved uniformity when deposited by atomic layer deposition with cycle times of at least 10 seconds. The metal compounds also do not contain detectable carbon when the metal organic compound is vaporized at process conditions in the absence of solvents or excess ligands.

Ald Metal Oxide Deposition Process Using Direct Oxidation

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US Patent:
7569501, Aug 4, 2009
Filed:
May 31, 2006
Appl. No.:
11/421293
Inventors:
Craig R. Metzner - Fremont CA, US
Shreyas S. Kher - Campbell CA, US
Vidyut Gopal - Santa Clara CA, US
Shixue Han - Milpitas CA, US
Shankarram A. Athreya - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/31
US Classification:
438785, 257E21006, 42724919
Abstract:
Embodiments of the invention provide methods for forming hafnium materials, such as oxides and nitrides, by sequentially exposing a substrate to hafnium precursors and active oxygen or nitrogen species (e. g. , ozone, oxygen radicals, or nitrogen radicals). The deposited hafnium materials have significantly improved uniformity when deposited by these atomic layer deposition (ALD) processes. In one embodiment, an ALD chamber contains an expanding channel having a bottom surface that is sized and shaped to substantially cover a substrate positioned on a substrate pedestal. During an ALD process for forming hafnium materials, process gases form a vortex flow pattern while passing through the expanding channel and sweep across the substrate surface. The substrate is sequentially exposed to chemical precursors that are pulsed into the process chamber having the vortex flow.

Method For Fabricating An Integrated Gate Dielectric Layer For Field Effect Transistors

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US Patent:
7601648, Oct 13, 2009
Filed:
Jul 31, 2006
Appl. No.:
11/496411
Inventors:
Thai Cheng Chua - Cupertino CA, US
Shankar Muthukrisnan - Plano TX, US
Johanes Swenberg - Los Gatos CA, US
Shreyas Kher - Campbell CA, US
Chikuang Charles Wang - San Jose CA, US
Giuseppina Conti - Oakland CA, US
Yuri Uritsky - Newark CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/31
US Classification:
438763, 438287, 257E21409
Abstract:
Methods for forming a integrated gate dielectric layer on a substrate are provided. In one embodiment, the method includes forming a silicon oxide layer on a substrate, plasma treating the silicon oxide layer, depositing a silicon nitride layer on the silicon oxide layer by an ALD process, and thermal annealing the substrate. In another embodiment, the method includes precleaning a substrate, forming a silicon oxide layer on the substrate, plasma treating the silicon oxide layer, depositing a silicon nitride layer on the silicon oxide layer by an ALD process, and thermal annealing the substrate, wherein the formed silicon oxide layer and the silicon nitride layer has a total thickness less than 30 Å utilized as a gate dielectric layer in a gate structure.
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Shreyas S Kher from Campbell, CA, age ~64 Get Report