Inventors:
Sean Toshio Kainuma - Johnson City NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H03K 19/0175
Abstract:
A system comprising, a sense portion comprising a NAND logic gate that receives a first input logic signal associated with a lower voltage, wherein the sense portion outputs a sense logic signal, an intermediary portion comprising, a node operative to output an intermediary signal, a first pull down device, wherein the first pull down device receives a second input logic signal associated with the lower voltage complimentary with respect to the first input logic signal, a first pull up device that receives the sense logic signal, wherein the first pull up device is connected to a power supply at the higher operating voltage, and a second pull up device that receives the output logic signal associated with a higher voltage, an inverter portion, outputting the first output logic signal associated with the higher voltage responsive to a state of the intermediary signal.