Resumes
Resumes

Principal Engineer And Senior .Manager - Asic And Fpga Verification And Design
View pageLocation:
3356 Mill Valley Trce, Dacula, GA 30019
Industry:
Telecommunications
Work:
Ciena 2007 - Jul 2011
Principal Engineer
Adva Optical Networking 2007 - Jul 2011
Principal Engineer and Senior .Manager - Asic and Fpga Verification and Design
Polycom Feb 2004 - Aug 2007
Senior Hw Engineer
Seachange International Jan 1996 - Dec 2002
Lead Hardware Engineer
Scientific Atlanta 1993 - 1996
Hardware Design Engineer
Principal Engineer
Adva Optical Networking 2007 - Jul 2011
Principal Engineer and Senior .Manager - Asic and Fpga Verification and Design
Polycom Feb 2004 - Aug 2007
Senior Hw Engineer
Seachange International Jan 1996 - Dec 2002
Lead Hardware Engineer
Scientific Atlanta 1993 - 1996
Hardware Design Engineer
Education:
University of Florida 1984 - 1988
Masters, Master of Electrical Engineering, Computer Engineering West Virginia University 1980 - 1984
Bachelors, Bachelor of Science In Electrical Engineering
Masters, Master of Electrical Engineering, Computer Engineering West Virginia University 1980 - 1984
Bachelors, Bachelor of Science In Electrical Engineering
Skills:
Fpga
Verilog
Vhdl
Hardware Architecture
Systemverilog
Embedded Systems
Hardware
Digital Signal Processors
Debugging
Ethernet
Functional Verification
Firmware
Field Programmable Gate Arrays
Altera
Rtl Design
Otn
Digital Electronics
Xilinx
Tcl
Serdes
Sdh
Optical Transport Network
Modelsim
Integrated Circuit Design
Telecommunications
Verilog
Vhdl
Hardware Architecture
Systemverilog
Embedded Systems
Hardware
Digital Signal Processors
Debugging
Ethernet
Functional Verification
Firmware
Field Programmable Gate Arrays
Altera
Rtl Design
Otn
Digital Electronics
Xilinx
Tcl
Serdes
Sdh
Optical Transport Network
Modelsim
Integrated Circuit Design
Telecommunications