Saurabh Dawle

San Francisco, CA

Computer Hardware

Avnet
Xilinx Tse
Nvxl Technology, Inc. May 2017 - Jan 2019
Deep Learning Sw and Hw Fpga Engineer
Bitmicro Networks Aug 2015 - Apr 2017
Fpga and Asic Design and Verification Engineer
Bsnl Apr 2013 - May 2013
Industrial Trainee
Ilabs Robotics & Embedded Systems Research Lab India Aug 1, 2012 - Mar 1, 2013
Project Intern

University at Buffalo 2013 - 2015
Master of Science, Masters, Electronics Engineering Chatrapati Sahuji Maharaj Kanpur University, Kanpur 2008 - 2012
Bachelor of Engineering, Bachelors, Communications, Engineering, Electronics

Vhdl
C
Verilog
Embedded Systems
C++
Vlsi
Fpga
Xilinx Ise
Testing
Cadence Virtuoso
Computer Architecture
Asic
Research
Digital Circuit Design
Python
Linux
Opencl
Caffe
Caffe2
Tensorflow
Deep Learning
Cnn
Dnn
Algorithms
Programming
Electronics
Data Analysis
Numpy
Machine Learning

Children
Travelling
Education
Reading
New Technologies
Poverty Alleviation
Disaster and Humanitarian Relief
Animal Welfare

English
Hindi
Marathi

Dale Carnegie: Generation.next Program
Circuit Design, Analysis & Pcb Making
Vocational Training In Advanced Telecom
Hot-Combots and Jazzbotz Workshop
Seminar on Hr Policies and Expectation From the Fresh Engineering Graduates
Global Exposure Interactive Tour (Universities and Industries In Singapore)
It-Ethical Hacking
Neural Networks and Deep Learning
Structuring Machine Learning Projects
Improving Deep Neural Networks: Hyperparameter Tuning, Regularization and Optimization
Global Facts Certificate
License Rngmgnb448-2013-1306003
Dale Carnegie Training
Scientech Technologies Pvt. Ltd
Bharat Sanchar Nigam Limited, License Rngmgnb448-2013-1306003
Lare (Laboratory For Applied Research In Electronics)
Mac Green Singapore Pte Ltd.,
Meghe Group of Institutions (Mgi) - International Relations Office
It-Networkz

Bharat Sanchar Nigam Limited, India
Nagpur, Maharashtra
May 2013 to May 2013
Industrial Trainee in Advanced Telecom
ILABS
Nagpur, Maharashtra
Jun 2011 to Jun 2011
Project Trainee at ILABS
ScienTECH Technologies, India

Jan 2011 to Jan 2011
Trainee at PCB Designing workshop
LARE and IEEE Fraternity @ YCCE

Aug 2009 to Aug 2009
Project Trainee for Hot-Combots and Jazzbots by LARE and IEEE Fraternity @ YCCE

SUNY at Buffalo
Buffalo, NY
2013 to 2015
MS in Electrical and Electronics Engineering
RTM Nagpur University
Nagpur, Maharashtra
2008 to 2012
BE in Electronics and Communication Engineering

SUNY - University at Buffalo
Buffalo, NY
Aug 2013 to Feb 2015
STUDENT
Nagpur University
Nagpur, Maharashtra
Aug 2008 to Jun 2012
STUDENT
iLabs
Nagpur, Maharashtra
Project Trainee
scienTECH Technologies, India
Nagpur, Maharashtra
Project Trainee
LARE and IEEE Fraternity @ YCCE, Nagpur, India
Nagpur, Maharashtra
Project Trainee

University at Buffalo, The State University of New York
Buffalo, NY
2013 to 2015
MS in Electrical and Electronics Engineering
Nagpur University
Nagpur, Maharashtra
2008 to 2012
B.E. in Electronics and Communications Engineering

C, C++, VHDL, Verilog, Assembly Language, Python, Perl, HTML, CSS, JavaScript, VBScript, FPGA, ASIC, SOC, RTL logic design, CMOS, PADs logic layout, ESD, CMOS, Bipolar, Bi-CMOS, ARM Cortex M3, Atlys Spartan-6 / Spartan 3E board, EDA/ECAD(cadence), Altera/Xilinx ISE, MATLAB, Aldec HDL, Digilent Adept, Mosek, Labview, P-spice, LT-Spice, ns-3, Wireshark, I2C, CAN, SPI, UART, TCP/IP, Memory sub-system, Pipelining, Analog /Digital Circuits, Memory sub-system, Electronic Systems (Troubleshoot, Validation)