Resumes
Resumes

Power Delivery Research Scientist, Staff
View pageLocation:
San Diego, CA
Industry:
Research
Work:
Intel Corporation
Power Delivery Research Scientist at Tscg
University of California, San Diego Sep 2014 - Dec 2018
Graduate Student Researcher
Qualcomm Jun 2018 - Sep 2018
Pmic Engineering Intern
Texas Instruments Jul 2017 - Sep 2017
Research Intern In Kilby Labs
Intel Corporation Jun 2015 - Sep 2015
Graduate Technical Intern
Power Delivery Research Scientist at Tscg
University of California, San Diego Sep 2014 - Dec 2018
Graduate Student Researcher
Qualcomm Jun 2018 - Sep 2018
Pmic Engineering Intern
Texas Instruments Jul 2017 - Sep 2017
Research Intern In Kilby Labs
Intel Corporation Jun 2015 - Sep 2015
Graduate Technical Intern
Education:
Uc San Diego 2014 - 2018
Doctorates, Doctor of Philosophy, Computer Engineering, Philosophy Nile University 2009 - 2011
Masters, Design Ain Shams University 2004 - 2009
Bachelors, Bachelor of Arts, Electronics, Engineering, Communications Saint Fatima School Nasr City 2001 - 2004
Doctorates, Doctor of Philosophy, Computer Engineering, Philosophy Nile University 2009 - 2011
Masters, Design Ain Shams University 2004 - 2009
Bachelors, Bachelor of Arts, Electronics, Engineering, Communications Saint Fatima School Nasr City 2001 - 2004
Skills:
Matlab
Analog Circuit Design
Mixed Signal
Very Large Scale Integration
Mixed Signal Simulations
Application Specific Integrated Circuits
Pcb Design
Layout
Perl
Verilog
Cadence Virtuoso
Layout Design
Cadence Spectre
Matlab/Veriloga Modeling
Field Programmable Gate Arrays
On Die Power Management In Scaled Cmos
Design For Testability
Lab Measurements
Tcl
Ocean Script
Cadence Virtuoso Layout Editor
Cadence Skill Language
Cadence Schematic Capture
Circuit Design
Ams Simulations
Analog Circuit Design
Mixed Signal
Very Large Scale Integration
Mixed Signal Simulations
Application Specific Integrated Circuits
Pcb Design
Layout
Perl
Verilog
Cadence Virtuoso
Layout Design
Cadence Spectre
Matlab/Veriloga Modeling
Field Programmable Gate Arrays
On Die Power Management In Scaled Cmos
Design For Testability
Lab Measurements
Tcl
Ocean Script
Cadence Virtuoso Layout Editor
Cadence Skill Language
Cadence Schematic Capture
Circuit Design
Ams Simulations
Certifications:
Micro-Mba

Sally Amin
View pageIndustry:
Banking

Sally Amin
View page