Inventors:
Robert J. Valek - Wheaton IL
Todd H. Gartner - Elmhurst IL
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
F02M 2506
F02D 500
Abstract:
A digital signal processing circuit for controlling the spark timing and exhaust gas recirculation (EGR) of an internal combustion engine is disclosed herein. The circuit first samples the magnitude of the vacuum manifold pressure and produces a complex function analog output signal in response thereto. The output signal is produced by first converting the vacuum pressure to a digital signal, then using a read only memory to produce a complex function digital output signal and then reconverting the digital output signal to an analog output signal. The pressure analog output signal is then stored in a first holding device. Subsequently, an analog signal proportional to the period of engine revolution is sampled by the same circuit. However, the circuit now develops a digital output signal which is a function of the inverse of this analog input signal and this inverse digital output signal is effectively multiplied by the held pressure analog signal to produce an EGR analog control voltage which is stored in a second holding device. Subsequently, an analog output signal which is a different inverse function of the engine period is developed and stored in the first holding device and then the EGR analog output signal is processed by the circuit and effectively multiplied by the analog signal now being held in the first holding device to produce a spark timing control analog output signal which is stored in a third holding device.
