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Robert Licklider Phones & Addresses

  • Shelton, WA
  • 1224 Alder Ave, Tehachapi, CA 93561 (661) 822-5863
  • 1539 China Lake Blvd, Ridgecrest, CA 93555
  • Inyokern, CA
  • Lake Isabella, CA
  • Kerman, CA
  • 4621 E Mason Lake Rd, Shelton, WA 98584 (760) 608-0734

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Publications

Us Patents

Artificial Neural Network System For Memory Modification

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US Patent:
51034964, Apr 7, 1992
Filed:
Jun 27, 1991
Appl. No.:
7/722413
Inventors:
David K. Andes - Ridgecrest CA
Robert A. Licklider - Ridgecrest CA
Donald H. Witcher - Ridgecrest CA
Richard M. Swenson - Ridgecrest CA
James F. Barbieri - Ridgecrest CA
Assignee:
The United States of America as represented by the Secretary of the Navy - Washington DC
International Classification:
G06F 1518
G06F 1546
US Classification:
395 24
Abstract:
An artificial neural network, which has a plurality of neurons each receiving a plurality of inputs whose effect is determined by adjust able weights at synapses individually connecting the inputs to the neuron to provide a sum signal to a sigmoidal function generator determining the output of the neuron, undergoes memory modification by a steepest-descent method in which individual variations in the outputs of the neurons are successively generated by small perturbations imposed on the sum signals. As each variation is generated on the output of a neuron, an overall error of all the neuron outputs in relation to their desired values is measured and compared to this error prior to the perturbation. The difference in these errors, with adjustments which may be changed as the neuron outputs converge toward their desired values, is used to modify each weight of the neuron presently subjected to the perturbation.

Artificial Neural Network Implementation

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US Patent:
49512390, Aug 21, 1990
Filed:
Oct 27, 1988
Appl. No.:
7/263455
Inventors:
David K. Andes - Ridgecrest CA
Robert A. Licklider - Ridgecrest CA
Donald H. Witcher - Ridgecrest CA
Richard M. Swenson - Ridgecrest CA
Assignee:
The United States of America as represented by the Secretary of the Navy - Washington DC
International Classification:
G06C 712
G06C 7163
US Classification:
364807
Abstract:
An artificial neural network having analog circuits for simultaneous parallel processing using individually variable synaptic input weights. The processing is implemented with a circuit adapted to vary the weight, which may be stored in a metal oxide field effect transistor, for teaching the network by addressing from outside the network or for Hebbian or delta rule learning by the network itself.

Memory Modification Of Artificial Neural Networks

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US Patent:
50758683, Dec 24, 1991
Filed:
Sep 18, 1989
Appl. No.:
7/410373
Inventors:
David K. Andes - Ridgecrest CA
Robert A. Licklider - Ridgecrest CA
Donald H. Witcher - Ridgecrest CA
Richard M. Swenson - Ridgecrest CA
James F. Barbieri - Ridgecrest CA
Assignee:
The United States of America as represented by the Secretary of the Navy - Washington DC
International Classification:
G06F 1546
US Classification:
395 23
Abstract:
An artificial neural network, which has a plurality of neurons each receiving a plurality of inputs whose effect is determined by adjust able weights at synapses individually connecting the inputs to the neuron to provide a sum signal to a sigmoidal function generator determining the output of the neuron, undergoes memory modification by a steepest-descent method in which individual variations in the outputs of the neurons are successively generated by small perturbations imposed on the sum signals. As each variation is generated on the output of a neuron, an overall error of all the neuron outputs in relation to their desired values is measured and compared to this error prior to the perturbation. The difference in these errors, with adjustments which may be changed as the neuron outputs converge toward their desired values, is used to modify each weight of the neuron presently subjected to the perturbation.

Method And Circuits For Neuron Perturbation In Artificial Neural Network Memory Modification

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US Patent:
51504502, Sep 22, 1992
Filed:
Oct 1, 1990
Appl. No.:
7/591318
Inventors:
Richard M. Swenson - Ridgecrest CA
David K. Andes - Ridgecrest CA
Donald H. Witcher - Ridgecrest CA
Robert A. Licklider - Ridgecrest CA
James F. Barbieri - Ridgecrest CA
Assignee:
The United States of America as represented by the Secretary of the Navy - Washington DC
International Classification:
G06F 1518
G06F 1546
US Classification:
395 23
Abstract:
An artificial neural network has a plurality of output circuits individually perturbable for memory modification or learning by the network. The network has a plurality of synapses individually connecting each of a plurality of inputs to each output circuit. Each synapse has a weight determining the effect on the associated output circuit of a signal provided on the associated input, and the synapse is addressable for selective variation of the weight. A perturbation signal is provided to one input, while data signals are provided to others of the inputs, so that perturbation of each output circuit may be controlled by varying the weights of a set of the synapses connecting the perturbation signal to the output circuits. An output circuit may be selected for perturbation by loading an appropriate weight in the synapse connecting the perturbation signal to the output circuit while zeroing the weights of the synapses connecting the perturbation signal to other output circuits. Where the weights are provided by devices incapable of repeated cycles of zeroing and reloading, each synapse connecting the perturbation intput to an output circuit has an addressable switch which is closed for perturbation of this output circuit and which is open at other times.

Minimum Memory Digital Convolver

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US Patent:
20210034956, Feb 4, 2021
Filed:
Mar 31, 2020
Appl. No.:
16/836443
Inventors:
- Cottonwood Heights UT, US
Robert A. LICKLIDER - Shelton WA, US
International Classification:
G06N 3/063
Abstract:
An advancement over previous techniques, input data frames are streamed row-by-row to a convolver that can calculate and stream out convolution values without storing the convolution values. For many convolution operations only a single row of partial sums is stored. As input data values are received, they can be multiplied by kernel values and accumulated as partial sums until a convolution value is calculated. Convolution values can be clocked out of the convolver as soon as they are produced, thereby freeing the memory cell for use in calculating a different convolution sum. Clocking out convolution values as soon as they become available produces an output data stream of convolution values. By freeing memory cells and then reusing them as soon as possible, a convolver with a small, perhaps minimum, number of memory cells amount of memory is realized.
Robert A Licklider from Shelton, WA, age ~68 Get Report