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Robert Hankinson Phones & Addresses

  • 972 Collin Cir, Princeton, TX 75407
  • McKinney, TX
  • 8536 Gladwood Ln, Dallas, TX 75243 (214) 349-2350
  • 6061 Village Bend Dr, Dallas, TX 75206
  • Van, TX
  • Athens, TX

Resumes

Resumes

Robert Hankinson Photo 1

Robert Hankinson

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Location:
United States
Robert Hankinson Photo 2

Robert Hankinson

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Business Records

Name / Title
Company / Classification
Phones & Addresses
Robert Hankinson
Owner
Robert L Hankinson Inc
New Single-Family General Contrs
5807 Gln Fls Ln, Dallas, TX 75209
(214) 265-9787
Robert L. Hankinson
President
NEBO OPERATING COMPANY
4849 Greenville Ave, Dallas, TX 75206
Robert L. Hankinson
Director
NEBO OIL COMPANY
6201 Hillcrest, Dallas, TX 75205
1102 S Beech St, Arcadia, LA 71001
Fox Run Apts #511, 1912 GREEN MTN, Little Rock, AR 72207
3400 Colgate Ave, Dallas, TX 75225
Robert L Hankinson
Incorporator
FEDERAL GAS COUPON EXCHANGE, INC
Robert Hankinson
Vice Presi, Vice President
CONNATSER HANKINSON PUBLICATIONS, LLC
Misc Publishing
3100 Monticello Ave STE 130, Dallas, TX 75205
5807 Gln Fls Ln, Dallas, TX 75206
Robert L. Hankinson
President, Director
Jrco, Inc
3100 Monticello Ave, Dallas, TX 75205
Robert L Hankinson
Director, President
FEDERAL GAS COUPON, INC
Business Services
972 Collin Cir, Princeton, TX 75407
6643 Edloe St, Houston, TX 77005
Robert L Hankinson
President, Director, Director
FEDERAL GAS COUPON EXCHANGE, INC
100 Biscayne Blvd, Miami, FL
3400 Colgate Ave, Dallas, TX

Publications

Us Patents

Automatic Step Generator For Self-Correction Of Sampling

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US Patent:
57868689, Jul 28, 1998
Filed:
Dec 22, 1995
Appl. No.:
8/578301
Inventors:
Robert J. Hankinson - Carrollton TX
Assignee:
Cirrus Logic, Inc. - Fremont CA
International Classification:
H04N 512
US Classification:
348536
Abstract:
An automatic step generator that monitors and corrects the sampling rate in a video signal. The invention isolates a sampling window in the prevailing sampling rate, the window advantageously being 144 lines for NTSC, or 231 lines for PAL, or some other preselected window wherein the sample count therein at an ideal sampling rate approximates an integer power of 2. The invention then calculates the numeric difference between that ideal sample count in the window and the preselected integer power of 2. The actual sample count in the window is then determined, and is adjusted by the numeric difference between the ideal count and the integer power of 2. Variations in this adjusted actual sample count and the integer power of 2 will thus represent variations between the actual sampling rate and the ideal sampling rate. A step value to correct the actual sampling rate to achieve the ideal rate may then be derived by dividing the adjusted actual sample count by the integer power of 2. In binary, this division is simply a shift right in bit significance.

System And Method For Decoding A Quadrature Ampliture Modulated Signal

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US Patent:
57036608, Dec 30, 1997
Filed:
Feb 8, 1996
Appl. No.:
8/598453
Inventors:
Robert J. Hankinson - Carrollton TX
Otto Sponring - San Jose CA
Assignee:
Cirrus Logic, Inc. - Fremont CA
International Classification:
H04N 565
US Classification:
348638
Abstract:
A video signal decoder using a sample clock tied to a frequency that is an integer multiple of four times the color subcarrier (4*Fsc). By using a 4*Fsc rate on a given input wave, the decoder determines the phase shift between the sample clock and the original wave being sampled. Then, the decoder calculates the color based upon that shift. Circuitry for implementing the decoder contains two major circuit paths. The decoding process consists of two main phases and each path performs a different function during each phase. During the first phase, the first path calculates constants based upon a user's hue and saturation adjustments used for chroma demodulation. Also during the first phase, the second path examines the color burst signal and from that signal finds the black level of the incoming video signal. During the second phase, the first path decodes the color in the TV signal using the constants calculated during the first phase. Also during the second phase, the second path pulls the luma information out of the signal line.

Method And System For Reducing Numeric Counting Levels In Resampling Control Circuitry

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US Patent:
57581380, May 26, 1998
Filed:
Dec 22, 1995
Appl. No.:
8/576943
Inventors:
Robert J. Hankinson - Carrollton TX
International Classification:
G06F 114
G06F 305
G06F 702
US Classification:
395557
Abstract:
A method and system in which the numeric values to which counters in resampling control circuitry may be reduced. As a result, smaller registers to hold such reduced numeric values may be designed into hardware implementing said circuitry. These smaller registers present savings in processing power and hardware allocation, thereby potentially improving response times and cost efficiency of said hardware.

Reduction Of Numeric Counting Levels In Resampling

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US Patent:
60382732, Mar 14, 2000
Filed:
Nov 26, 1997
Appl. No.:
8/979670
Inventors:
Robert J. Hankinson - Carrollton TX
Assignee:
Cirrus Logic, Inc. - Fremont CA
International Classification:
G06F 114
G06F 702
G06F 305
H04L 2714
US Classification:
375355
Abstract:
A method and system in which the numeric values to which counters in resampling control circuitry may be reduced. As a result, smaller registers to hold such reduced numeric values may be designed into hardware implementing said circuitry. These smaller registers present savings in processing power and hardware allocation, thereby potentially improving response times and cost efficiency of said hardware.

System And Method For Multi-Level Gain Control

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US Patent:
58383905, Nov 17, 1998
Filed:
Dec 22, 1995
Appl. No.:
8/577652
Inventors:
Robert J. Hankinson - Carrollton TX
Scott Curry - Coppell TX
Assignee:
Cirrus Logic, Inc. - Fremont CA
International Classification:
H04N 552
US Classification:
348682
Abstract:
An analog to digital converter circuit having sync control is constructed to monitor the sync condition of the digital output. When sync is lost, for example due to a low input signal level or due to an out of phase situation, the gain of the output increased to relatively high level so as to enhance the possibility of detecting the sync condition. As soon as sync is reestablished the gain is immediately turned down to a level lower than the blanking level and then gradually increased to the blanking level. The gain levels at startup and during the sync reestablishment intervals are fixed but under selective control.

System And Method For Extracting Caption Teletext Information From A Video Signal

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US Patent:
56570880, Aug 12, 1997
Filed:
Dec 22, 1995
Appl. No.:
8/578300
Inventors:
Robert J. Hankinson - Carrollton TX
Assignee:
Cirrus Logic, Inc.
International Classification:
H04N 708
US Classification:
348465
Abstract:
A clocking circuit for extracting data from a video signal where the data is imbedded with other data and where the clocking rate for obtaining the data is slow as compared to the actual data rate. The circuit derives a calculated starting point for the data, using a double sample rate and a derivative to determine the beginning of the first data pulse. A clock signal is then derived which is calculated to between the leading and trailing edges of any received data pulse.
Robert L Hankinson from Princeton, TX, age ~92 Get Report