Inventors:
Seung-Chul Song - Austin TX, US
Zhibo Zhang - Austin TX, US
Byoung Lee - Austin TX, US
Naim Moumen - Walden NY, US
Joel Barnett - Austin TX, US
Muhammad Hussain - Austin TX, US
Rino Choi - Austin TX, US
Husam Alshareef - Austin TX, US
International Classification:
H01L 21/8238
H01L 21/8234
H01L 21/4763
H01L 21/3205
US Classification:
438199000, 438275000, 438229000, 438592000, 438585000
Abstract:
Methods for fabricating two metal gate stacks for complementary metal oxide semiconductor (CMOS) devices are provided. A first metal layer may be deposited onto a gate dielectric. Next a mask layer may be deposited on the first metal layer and subsequently etch. The first metal layer is then etched. Without removing the mask layer, a second metal layer may be deposited. In one embodiment, the mask layer is a second metal layer. In other embodiments, the mask layer is a silicon layer. Subsequent fabrication steps include depositing another metal layer (e.g., another PMOS metal layer), depositing a cap, etching the cap to define gate stacks, and simultaneously etching the first and second gate region having a similar thickness with differing metal layers.