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Richard Doug Degroot

from Dallas, TX
Age ~74
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Also known as:
Doug D Degroot, Richard D Degroot, Ric Doug Degroot, Douglas D Degroot
Phone and address:
4920 Bellerive Dr, Dallas, TX 75287
Related to:
Gerald E Morgan, 87Ashley Degroot, 38Ashley Degroot, 45Katherine Degroot, 68Doug DegrootMichael Drake, 41
Connected to:
Agnes E Degroot, 67Amber N Degroot, 42Anne S Degroot, 68Bruce R Degroot, 67Carl Degroot, 106Carol L Degroot, 54Charlene G Degroot, 45Chris Degroot, 46Christina C Degroote, 48Craig R Degroot, 57

Richard Degroot Phones & Addresses

  • 4920 Bellerive Dr, Dallas, TX 75287
  • Foster City, CA
  • Yorktown Heights, NY

Resumes

Resumes

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Richard Degroot

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Richard Degroot

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Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Richard L Degroot
President
SAFE-T-GRATE, INC

Publications

Us Patents

Special Accumulate Instruction For Multiple Floating Point Arithmetic Units Which Use A Putaway Bus To Enhance Performance

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US Patent:
46835474, Jul 28, 1987
Filed:
Oct 25, 1984
Appl. No.:
6/664739
Inventors:
Richard D. DeGroot - Yorktown Heights NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 738
US Classification:
364748
Abstract:
A data processing system includes a multiple floating point arithmetic unit with a putaway and a bypass bus, which includes a new instruction for handling multiple multiply or divide instructions. These instructions are separated by add operations, including passing the results of each multiply/divide operation on a bypass bus to the input of an adder along with the inputs from an accumulate bypass bus which is the output from the adder for an automatic add operation on an accumulate multiply or accumulate divide operation. This allows two floating point results to be produced each cycle, one of which can be accumulated without any intervening control by the central decoder. The accumulation is performed under distributed control of the accumulator logic itself.

Dual Putaway/Bypass Busses For Multiple Arithmetic Units

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US Patent:
47665645, Aug 23, 1988
Filed:
Aug 13, 1984
Appl. No.:
6/639754
Inventors:
Richard D. DeGroot - Yorktown Heights NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 738
US Classification:
364748
Abstract:
A data processing system includes multiple floating point arithmetic units, for example, an adder and a multiplier. Two putaway busses and two bypass busses are connected to a register file and waiting stages, associated with the arithmetic units, respectively. A special source register is included for keeping track of the source of any result on the busses so that the registers may be connected to the appropriate bus on which the result is to appear in accordance with a busy or mark bit set in each register in the file and in the waiting stage. This allows multiple data items to exit the pipes during any cycle. Therefore, two or more results are produced each cycle.
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Richard Doug Degroot from Dallas, TX, age ~74 Get Report