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Ralf J Muenster

from Saratoga, CA
Age ~56
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Also known as:
Ralf Munster, Muenster Muenster
Phone and address:
14411 Quito Rd, Saratoga, CA 95070
(408) 871-8100
Connected to:
Andy H Muenster, 44Ryan J Muenster, 43Zachary Muenstermann, 30Alicia D Muentener, 38Gary A Muentener, 68Amanda Muentes, 37Dennys A Muentes, 39Heather M Muentes, 38Janet C Muentes, 42Rich J Muenter, 68

Ralf Muenster Phones & Addresses

  • 14411 Quito Rd, Saratoga, CA 95070 (408) 871-8100
  • Seaside, CA
  • 1171 Bucknam Ave, Campbell, CA 95008 (408) 871-8100 (408) 871-8500
  • 2101 Fallen Leaf Ln, Los Altos, CA 94024 (650) 961-7998
  • 2070 Fallen Leaf Ln, Los Altos, CA 94024
  • 2101A Fallen Leaf Ln, Los Altos, CA 94024
  • Los Gatos, CA
  • Sunnyvale, CA
  • San Bruno, CA
  • Monterey, CA
  • Santa Clara, CA
  • Kensington, CA
  • Belmont, CA

Publications

Us Patents

Switching Regulator With Programmable Output Levels Using A Single Input Pin

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US Patent:
7218086, May 15, 2007
Filed:
May 1, 2006
Appl. No.:
11/381092
Inventors:
David W. Ritter - San Jose CA, US
Bruce Hennig - Pleasanton CA, US
Ralf J. Muenster - Campbell CA, US
Assignee:
Micrel, Inc. - San Jose CA
International Classification:
G05F 5/00
US Classification:
323303, 323284, 323299
Abstract:
A switching regulator provides programming output current control through a single input terminal by modifying the reference voltage in the control loop of the switching regulator. The switching regulator includes a first input terminal receiving a program input voltage indicative of a desired output current, a voltage divider receiving a first reference voltage and providing a second reference voltage at a first node between the first and second resistors and a third reference voltage at a second node between the second and third resistors, and a precision active pulldown circuit coupled to receive the program input voltage and operative to pull down the second reference voltage at the first node in response to the program input voltage. In operation, the third reference voltage is used in the control loop of the switching regulator to control the output current of the switching regulator in response to the program input voltage.

Password And Dynamic Protection Of Flash Memory Data

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US Patent:
6731536, May 4, 2004
Filed:
Mar 7, 2002
Appl. No.:
10/091767
Inventors:
Mark Alan McClain - San Diego CA
Michael Garrett Tanaka - San Jose CA
Ralf Muenster - Los Altos CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G11C 700
US Classification:
36518504, 36518529, 36518901, 365218
Abstract:
In protecting Flash memory data, a flexible system and method provides for different levels of protection. It offers the ability to dynamically lock a sector of memory using a dynamic protection bit in volatile memory. It offers persistent locking of a sector using a non-volatile bit in memory and locking this status using a lock bit in volatile memory. It offers yet further protection by including a password mode which requires a password to clear the lock bit. The password is located in an unreadable, one time programmable area of the memory. The memory also includes areas, whose protection state is controlled by an input signal, for storing boot code in a protected manner.

Nanowires Plated On Nanoparticles

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US Patent:
20220189903, Jun 16, 2022
Filed:
Feb 24, 2022
Appl. No.:
17/679087
Inventors:
- Dallas TX, US
Ralf Muenster - Saratoga CA, US
Sreenivasan Kalyani Koduri - Allen TX, US
International Classification:
H01L 23/00
H01L 23/367
H01L 23/15
H01L 23/495
H01L 23/373
Abstract:
In some examples, a system comprises a set of nanoparticles and a set of nanowires extending from the set of nanoparticles.

Semiconductor Die Orifices Containing Metallic Nanowires

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US Patent:
20200321267, Oct 8, 2020
Filed:
Apr 8, 2020
Appl. No.:
16/843618
Inventors:
- Dallas TX, US
Ralf Jakobskrueger MUENSTER - Saratoga CA, US
Sreenivasan Kalyani KODURI - Allen TX, US
International Classification:
H01L 23/48
H01L 21/768
H01L 23/00
H01L 23/495
Abstract:
In some examples, a semiconductor package comprises a semiconductor die having a first surface and a second surface opposing the first surface. The package comprises an orifice extending through a thickness of the semiconductor die from the first surface to the second surface. The package comprises a set of metallic nanowires positioned within the orifice and extending through the thickness of the semiconductor die from the first surface to the second surface.

Nanowires Plated On Nanoparticles

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US Patent:
20200321302, Oct 8, 2020
Filed:
Apr 8, 2020
Appl. No.:
16/843559
Inventors:
- Dallas TX, US
Ralf Jakobskrueger MUENSTER - Saratoga CA, US
Sreenivasan Kalyani KODURI - Allen TX, US
International Classification:
H01L 23/00
H01L 23/367
H01L 23/15
H01L 23/495
H01L 23/373
Abstract:
In some examples, a system comprises a set of nanoparticles and a set of nanowires extending from the set of nanoparticles.

Nanowire Interfaces

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US Patent:
20200321303, Oct 8, 2020
Filed:
Apr 8, 2020
Appl. No.:
16/843580
Inventors:
- Dallas TX, US
Benjamin Stassen COOK - Los Gatos CA, US
Ralf Jakobskrueger MUENSTER - Saratoga CA, US
International Classification:
H01L 23/00
H01L 23/495
H01L 21/78
H01L 23/31
Abstract:
In some examples, a system comprises a first component having a first surface, a first set of nanoparticles coupled to the first surface, and a first set of nanowires extending from the first set of nanoparticles. The system also comprises a second component having a second surface, a second set of nanoparticles coupled to the second surface, and a second set of nanowires extending from the second set of nanoparticles. The system further includes an adhesive positioned between the first and second surfaces. The first and second sets of nanowires are positioned within the adhesive.

Dielectric And Metallic Nanowire Bond Layers

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US Patent:
20200321304, Oct 8, 2020
Filed:
Apr 8, 2020
Appl. No.:
16/843717
Inventors:
- Dallas TX, US
Benjamin Stassen COOK - Los Gatos CA, US
Ralf Jakobskrueger MUENSTER - Saratoga CA, US
Sreenivasan Kalyani KODURI - Allen TX, US
International Classification:
H01L 23/00
Abstract:
In some examples, an electronic device comprises a first component having a surface, a second component having a surface, and a bond layer positioned between the surfaces of the first and second components to couple the first and second components to each other. The bond layer includes a set of metallic nanowires and a dielectric portion. The dielectric portion comprises a polymer matrix and dielectric nanoparticles.
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Ralf J Muenster from Saratoga, CA, age ~56 Get Report