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Rajeev Gopalakrishna Phones & Addresses

  • 1018 NE Parks Edge Cir, Hillsboro, OR 97124
  • 6742 NE Vinings Way, Hillsboro, OR 97124
  • 3860 NW Mortensen Ter, Portland, OR 97229
  • 400 N River Rd, West Lafayette, IN 47906
  • 101 Russell St, West Lafayette, IN 47906
  • 3144 Eagles Way Dr, Lafayette, IN 47909
  • W Lafayette, IN

Publications

Us Patents

Managing And Implementing Metadata In Central Processing Unit Using Register Extensions

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US Patent:
20110078389, Mar 31, 2011
Filed:
Sep 30, 2009
Appl. No.:
12/571269
Inventors:
Baiju V. Patel - Portland OR, US
Rajeev Gopalakrishna - Hillsboro OR, US
Andrew F. Glew - Hillsboro OR, US
Robert J. Kushlis - Worcester MA, US
Don Alan Van Dyke - Rescue CA, US
Joseph Frank Cihula - Hillsboro OR, US
Asit K. Mallick - Saratoga CA, US
James B. Crossland - Banks OR, US
Gilbert Neiger - Portland OR, US
Scott Dion Rodgers - Hillsboro OR, US
Martin Guy Dixon - Portland OR, US
Mark Jay Charney - Lexington MA, US
Jocob Gottlieb - Kiryat Tivon, IL
International Classification:
G06F 9/30
G06F 12/02
G06F 9/302
US Classification:
711154, 712225, 711200, 712221, 712E09016, 711E12002, 712E09017
Abstract:
A set of default registers of a processor are expanded into metadata registers on the processor of a computer system. The default registers having stored thereon data, while metadata which is related to the data is stored separately on the metadata registers.

Instruction For Performing An Overload Check

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US Patent:
20170109160, Apr 20, 2017
Filed:
Aug 16, 2016
Appl. No.:
15/238703
Inventors:
- Santa Clara CA, US
BAIJU V. PATEL - Portland OR, US
RAJEEV GOPALAKRISHNA - Hillsboro OR, US
International Classification:
G06F 9/30
G06F 9/38
Abstract:
A processor is described having a functional unit within an instruction execution pipeline. The functional unit having circuitry to determine whether substantive data from a larger source data size will fit within a smaller data size that the substantive data is to flow to.

Method, Apparatus, System, And Computer Readable Medium For Providing Apparatus Security

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US Patent:
20160323297, Nov 3, 2016
Filed:
Mar 28, 2016
Appl. No.:
15/081992
Inventors:
- Santa Clara CA, US
Eran Birk - Haifa, IL
Baiju Patel - Portland OR, US
Steven Grobman - El Dorado Hills CA, US
Tobias Kohlenberg - Portland OR, US
Rajeev Gopalakrishna - Hillsboro OR, US
International Classification:
H04L 29/06
Abstract:
Technologies are provided in embodiments for receiving policy information associated with at least one security exception, the security exception relating to execution of at least one program, determining an operation associated with the security exception based, at least in part, on the policy information, and causing the operation to be performed, based at least in part, on a determination that the at least one security exception occurred.

Instruction For Performing An Overload Check

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US Patent:
20140281406, Sep 18, 2014
Filed:
Mar 15, 2013
Appl. No.:
13/843558
Inventors:
Martin DIXON - Portland OR, US
Baiju PATEL - Portland OR, US
Rajeev GOPALAKRISHNA - Hillsboro OR, US
International Classification:
G06F 9/38
US Classification:
712216
Abstract:
A processor is described having a functional unit within an instruction execution pipeline. The functional unit having circuitry to determine whether substantive data from a larger source data size will fit within a smaller data size that the substantive data is to flow to.
Rajeev Gopalakrishna from Hillsboro, OR, age ~48 Get Report