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Priyanka M Tembey

from San Francisco, CA
Age ~40
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Also known as:
Priyanka M Temby, Mohan P Tembe, Embet T Mohan
Related to:
Myles C Temby, 69Kristine A Engel, 62Eva Temby, 44Kathryn K TembyKathy A Killmeyer, 64Kathryn Killmeyer Temby, 64Weslley D Temby, 43Barbara R Temby
Connected to:
Nishant Tembhare, 41Jose A Temblador, 62Francis O Tembo, 55Khuzwayo R Tembo, 31Mary Tembo, 49Nathan Tembo, 28Sarah Tembo, 52Walter Tembo, 50Karen C Temborius, 61Jawahar M Tembulkar, 66

Priyanka Tembey Phones & Addresses

  • San Francisco, CA
  • Mountain View, CA
  • Atlanta, GA
  • Hillsboro, OR

Work

Company: Georgia institute of technology May 2008 Position: Ph.d. candidate (computer science)

Education

Degree: Master of Science (MS) School / High School: Georgia Institute of Technology 2006 to 2008 Specialities: Computer Science

Skills

Operating Systems • Distributed Systems • Algorithms • Computer Science • C • C++ • Python • Data Structures • Java • Linux Kernel • Cloud Computing • Resource Management • Hypervisor • Parallel Computing • Scalable Architecture

Ranks

Certificate: Neural Networks and Deep Learning

Interests

Research • Virtualization • Resource Management • Os/Distributed Systems

Industries

Computer Software

Resumes

Resumes

Priyanka Tembey Photo 1

Senior Staff Engineer

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Location:
Santa Clara, CA
Industry:
Computer Software
Work:
Georgia Institute of Technology since May 2008
Ph.D. Candidate (Computer Science)
Intel Labs May 2011 - Aug 2011
Research Intern (Systems Software Group)
IBM T.J Watson Research Labs May 2010 - Aug 2010
Research Intern (Operating Systems Team)
VMware - Cambridge, Massachusetts May 2009 - Aug 2009
Research Intern (Mobile Virtualization Platform Team)
Education:
Georgia Institute of Technology 2006 - 2008
Master of Science (MS), Computer Science Cummins College of Engineering, Poona, India 2002 - 2006
Bachelor's degree, Computer Science
Skills:
Operating Systems
Distributed Systems
Algorithms
Computer Science
C
C++
Python
Data Structures
Java
Linux Kernel
Cloud Computing
Resource Management
Hypervisor
Parallel Computing
Scalable Architecture
Interests:
Research
Virtualization
Resource Management
Os/Distributed Systems
Certifications:
Neural Networks and Deep Learning
Improving Deep Neural Networks: Hyperparameter Tuning, Regularization and Optimization
Structuring Machine Learning Projects
Convolutional Neural Networks

Publications

Us Patents

Power Shifting In Multicore Platforms By Varying Smt Levels

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US Patent:
20130311812, Nov 21, 2013
Filed:
Jun 21, 2012
Appl. No.:
13/529161
Inventors:
Pradip Bose - Yorktown Heights NY, US
Alper Buyuktosunoglu - White Plains NY, US
Dilma M. Da Silva - White Plains NY, US
Hubertus Franke - Cortlandt Manor NY, US
Priyanka Tembey - Atlanta GA, US
Assignee:
INTERNATIONAL BUSINESS MACHINES - Armonk NY
International Classification:
G06F 1/26
G06F 9/46
G06F 11/30
US Classification:
713340
Abstract:
Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted.

Power Shifting In Multicore Platforms By Varying Smt Levels

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US Patent:
20130311811, Nov 21, 2013
Filed:
May 21, 2012
Appl. No.:
13/476179
Inventors:
Pradip Bose - Yorktown Heights NY, US
Alper Buyuktosunoglu - White Plains NY, US
Dilma Menezes Da Silva - White Plains NY, US
Hubertus Franke - Cortlandt Manor NY, US
Priyanka Tembey - Atlanta GA, US
Assignee:
INTERNATIONAL BUSINESS MACHINES - Armonk NY
International Classification:
G06F 1/28
G06F 9/30
US Classification:
713340
Abstract:
Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted.

Methods And Apparatus To Cross Configure Network Resources Of Software Defined Data Centers

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US Patent:
20210385131, Dec 9, 2021
Filed:
Aug 23, 2021
Appl. No.:
17/409713
Inventors:
- Palo Alto CA, US
Raj Yavatkar - Saratoga CA, US
Priyanka Tembey - San Francisco CA, US
International Classification:
H04L 12/24
H04L 12/26
H04L 12/46
H04L 29/08
Abstract:
Methods and apparatus to cross configure network resources of software defined data centers are disclosed. Example instructions cause one or more processors to monitor a component of a network for a probe packet sent to the component. The example instructions cause the one or more processors to, in response to detecting the probe packet, determine whether the probe packet includes a unique source media access control (MAC) address that is included in a probe access control list (ACL), the unique source MAC address included in the probe ACL set by a decision engine. The example instructions cause the one or more processors to, in response to determining that the probe packet does not include the unique source MAC address, record probe packet receipt information indicating that the probe packet did not pass through a network port of the component and transmit the probe packet receipt information to the decision engine.

Methods And Apparatus To Configure Switches Of A Virtual Rack

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US Patent:
20190028342, Jan 24, 2019
Filed:
Jul 20, 2017
Appl. No.:
15/655632
Inventors:
- Palo Alto CA, US
Raj Yavatkar - Saratoga CA, US
Priyanka Tembey - San Francisco CA, US
International Classification:
H04L 12/24
H04L 12/931
H04L 29/06
H04L 12/751
Abstract:
Methods and apparatus to configure switches of a virtual rack are disclosed. An example apparatus includes a hardware switch implementing a virtual switch on a virtual communication network, a packet analyzer to analyze a packet captured at the hardware switch, the packet analyzer to determine whether the packet is indicative of a packet flow issue corresponding to a negative effect on transfer of one or more packet flows on the virtual communication network, an issue handler to, in response to the determination by the packet analyzer, determine a modification to a configuration of the hardware switch based on a configuration of the virtual configuration network, and a hardware configuration agent to modify the configuration of the hardware switch based on the modification determined by the issue handler.

Methods And Apparatus To Cross Configure Network Resources Of Software Defined Data Centers

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US Patent:
20190028345, Jan 24, 2019
Filed:
Jul 20, 2017
Appl. No.:
15/655625
Inventors:
- Palo Alto CA, US
Raj Yavatkar - Saratoga CA, US
Priyanka Tembey - San Francisco CA, US
International Classification:
H04L 12/24
H04L 12/26
H04L 12/46
Abstract:
Methods and apparatus to cross configure network resources of software defined data centers are disclosed. An example method includes detecting a first configuration change for a first component of a first one of a virtual network or a physical network, the virtual network to provide networking for a virtual computing system, and the physical network to implement the virtual network, identifying, by executing an instruction with a processor, a second component of a second different one of the virtual network or the physical network corresponding to the first component, and making a second configuration change to the second component corresponding to the first configuration change.

Methods And Apparatus To Optimize Packet Flow Among Virtualized Servers

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US Patent:
20190028382, Jan 24, 2019
Filed:
Jul 20, 2017
Appl. No.:
15/655197
Inventors:
- Palo Alto CA, US
Raj Yavatkar - Saratoga CA, US
Priyanka Tembey - San Francisco CA, US
International Classification:
H04L 12/729
H04L 29/08
H04L 12/721
G06F 9/48
Abstract:
Methods, apparatus, systems, and articles of manufacture are disclosed. An example apparatus includes a packet analyzer to determine that a first virtualized server is preparing to migrate to a second virtualized server based on a data packet, a packet flow path generator to identify a set of network switches between the first virtualized server and the second virtualized server when the first virtualized server is in a different rackmount server than the second virtualized server, and a policy adjustor to adjust a policy of one or more network switches in the set to prioritize a packet flow corresponding to the migration.

Methods And Apparatus To Optimize Memory Allocation In Response To A Storage Rebalancing Event

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US Patent:
20190028400, Jan 24, 2019
Filed:
Jul 20, 2017
Appl. No.:
15/655193
Inventors:
- Palo Alto CA, US
Raj Yavatkar - Saratoga CA, US
Priyanka Tembey - San Francisco CA, US
International Classification:
H04L 12/911
H04L 12/801
G06F 9/50
H04L 12/26
Abstract:
Methods and apparatus to optimize memory allocation in response to a storage rebalancing event are disclosed. An example apparatus includes a telematics agent to detect a rebalancing event based on metadata; and a decision engine to identify a cluster corresponding to the rebalancing event by processing the metadata; and increase a number of jumbo buffers in a network switch corresponding to the cluster in response to the rebalancing event.

Power Shifting In Multicore Platforms By Varying Smt Levels

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US Patent:
20170308147, Oct 26, 2017
Filed:
May 25, 2017
Appl. No.:
15/605154
Inventors:
- Armonk NY, US
Alper BUYUKTOSUNOGLU - White Plains NY, US
Hubertus FRANKE - Cortlandt Manor NY, US
Priyanka TEMBEY - Atlanta GA, US
Dilma M. DA SILVA - College Station TX, US
International Classification:
G06F 1/32
G06F 9/50
G06F 1/26
G06F 9/48
G06F 1/32
G06F 1/32
Abstract:
Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted.
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Priyanka M Tembey from San Francisco, CA, age ~40 Get Report