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Prashant Krishna Gadgil

from Austin, TX
Age ~56
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Also known as:
Prashant K Gadgil, Prashant Kenney, Prashant Grzywa, Prashant Gagdil
Phone and address:
9509 Altona Way, Austin, TX 78717
(512) 626-8704
Related to:
Bela Gadgil, 23Vrinda P Gadgil, 53
Connected to:
Ashok J Gadgil, 69Himanshu S Gadgil, 50Omkar A Gadgil, 35Prajakta S Gadgil, 37Varsha S Gadgil, 56Harminder K Gadh, 66Kavita Gadhe, 48Aruna R Gadhia, 82Gaurav P Gadhia, 44Hansa T Gadhia, 65

Prashant Gadgil Phones & Addresses

  • 9509 Altona Way, Austin, TX 78717 (512) 626-8704
  • 15108 Thatcher Dr, Austin, TX 78717 (512) 248-1524
  • Fremont, CA
  • Stewart, TX
  • Lanier, TX
  • Opelika, TX
  • San Jose, CA
  • 15108 Thatcher Dr, Austin, TX 78717 (512) 633-3368

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Emails

p***[email protected]

Resumes

Resumes

Prashant Gadgil Photo 1

Director - Servicenow Practice

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Location:
15108 Thatcher Dr, Austin, TX 78717
Industry:
Information Technology And Services
Work:
Abhra Inc
Director - Servicenow Practice
Bp3 Global Jan 2012 - Apr 2019
Senior Process Automation Architect
Eforce 2003 - 2006
Senior Architect
Convio 2000 - 2003
Software Engineer
Education:
University of Cincinnati 1989 - 1993
Doctorates, Doctor of Philosophy Indian Institute of Technology, Bombay 1985 - 1989
Bachelors, Bachelor of Technology, Electrical Engineering
Prashant Gadgil Photo 2

Prashant Gadgil

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Business Records

Name / Title
Company / Classification
Phones & Addresses
Prashant Krishna Gadgil
Managing M, Managing
CRUNCHYMUNCHYTOGO LIMITED LIABILITY COMPANY
Fire/Casualty Insurance Carrier
9509 Altona Way, Austin, TX 78717
15108 Thatcher Dr, Austin, TX 78717
(512) 248-1524

Publications

Us Patents

Methods And Apparatus For Etching Self-Aligned Contacts

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US Patent:
57834962, Jul 21, 1998
Filed:
Mar 29, 1996
Appl. No.:
8/623526
Inventors:
Janet M. Flanner - Union City CA
Prashant Gadgil - Fremont CA
Linda N. Marquez - Fremont CA
Adrian Doe - Pleasanton CA
Joel M. Cook - Pleasanton CA
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
H01L 2100
US Classification:
438743
Abstract:
A method in a plasma processing chamber for fabricating a semiconductor device having a self-aligned contact. The method includes the step of providing a wafer having a substrate, a polysilicon layer disposed above the substrate, a nitride layer disposed above a polysilicon layer, and an oxide layer disposed above the nitride layer. The method further includes the step of etching in a first etching step partially through the oxide layer of the layer stack with a first chemistry and a first set of process parameters. In this first etching step, the first chemistry comprises essentially of CHF. sub. 3 and C. sub. 2 HF. sub. 5. The method also includes the step of etching the oxide layer in a second etching step through to the substrate with a second chemistry comprising CHF. sub. 3 and C. sub. 2 HF. sub. 5 and a second set of process parameters. The second set of process parameters is different from the first set of process parameters and represents a set of parameters for etching the oxide layer with a higher oxide-to-nitride selectivity than the oxide-to-nitride selectivity achieved in the first etching step.

Apparatus For Reducing Process Drift In Inductive Coupled Plasma Etching Such As Oxide Layer

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US Patent:
60487984, Apr 11, 2000
Filed:
Jun 5, 1996
Appl. No.:
8/658258
Inventors:
Prashant Gadgil - Fremont CA
Janet M. Flanner - Union City CA
John P. Jordon - San Jose CA
Adrian Doe - Pleasanton CA
Robert Chebi - Mountain View CA
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
H01L 2100
C23F 100
US Classification:
438714
Abstract:
A plasma processing chamber includes a substrate holder and a gas distribution plate having an inner surface facing the substrate holder, the inner surface being maintained below a threshold temperature to minimize process drift during processing of substrates. The inner surface is cooled by adding a heat transfer gas such as helium to process gas supplied through the gas distribution plate. The chamber can include a dielectric window between an antenna and the gas distribution plate. The control of the temperature of the inner surface facing the substrate minimizes process drift and degradation of the quality of the processed substrates during sequential processing of the substrates such as during oxide etching of semiconductor wafers.

Apparatus For Reducing Process Drift In Inductive Coupled Plasma Etching Such As Oxide Layer

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US Patent:
62418459, Jun 5, 2001
Filed:
Oct 21, 1999
Appl. No.:
9/421933
Inventors:
Prashant Gadgil - Fremont CA
Janet M. Flanner - Union City CA
John P. Jordan - San Jose CA
Adrian Doe - Pleasanton CA
Robert Chebi - Mountain View CA
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
H01L 2100
US Classification:
156345
Abstract:
A plasma processing chamber includes a substrate holder and a gas distribution plate having an inner surface facing the substrate holder, the inner surface being maintained below a threshold temperature to minimize process drift during processing of substrates. The inner surface is cooled by adding a heat transfer gas such as helium to process gas supplied through the gas distribution plate. The chamber can include a dielectric window between an antenna and the gas distribution plate. The control of the temperature of the inner surface facing the substrate minimizes process drift and degradation of the quality of the processed substrates during sequential processing of the substrates such as during oxide etching of semiconductor wafers.
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Prashant Krishna Gadgil from Austin, TX, age ~56 Get Report