Resumes
Resumes

Staff Research Development Engineer
View pageLocation:
5460 Bayfront Plz, Santa Clara, CA 95054
Industry:
Semiconductors
Work:
Marvell Semiconductor since Jul 2003
Staff Design Engineer
LSI Logic May 2000 - Jul 2003
Senior Design Engineer
Cirrus Logic Inc. Sep 1997 - Oct 2000
Design Engineer
BHEL India. Nov 1995 - May 1996
Design Intern
Staff Design Engineer
LSI Logic May 2000 - Jul 2003
Senior Design Engineer
Cirrus Logic Inc. Sep 1997 - Oct 2000
Design Engineer
BHEL India. Nov 1995 - May 1996
Design Intern
Education:
University of Southern California 1996 - 1997
Osmania University 1992 - 1996
Osmania University 1992 - 1996
Skills:
System Verilog
Verilog
Vhdl
Perl
Java
C++
Objective C
Algorithms
Rtl Design
Systemverilog
Fpga
Asic
Javascript
Security
Linux
Processors
Llvm
Verilog
Vhdl
Perl
Java
C++
Objective C
Algorithms
Rtl Design
Systemverilog
Fpga
Asic
Javascript
Security
Linux
Processors
Llvm

Pranab Bhooma
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