Search

Peter Asbeck Phones & Addresses

  • 4840 Tarantella Ln, San Diego, CA 92130 (858) 793-0975 (858) 793-0985
  • 13287 Tiverton Rd, San Diego, CA 92130 (858) 793-0975 (858) 793-0985
  • 13339 Tiverton Rd, San Diego, CA 92130 (858) 793-0975
  • 3970 Via Holgura, San Diego, CA 92130
  • Seattle, WA
  • 2234 El Amigo Rd, Del Mar, CA 92014 (858) 350-9046 (858) 793-0975 (858) 793-0985
  • 12919 Via Esperia, Del Mar, CA 92014 (858) 793-0985
  • Newbury Park, CA
  • Kiona, WA

Publications

Us Patents

High Performance Bipolar Transistor

View page
US Patent:
6506659, Jan 14, 2003
Filed:
Mar 17, 2001
Appl. No.:
09/811321
Inventors:
Peter J. Zampardi - Newbury Park CA
Klaus F. Schuegraf - Aliso Viejo CA
Paul Kempf - Santa Ana CA
Peter Asbeck - San Diego CA
Assignee:
Newport Fab, LLC - Newport Beach CA
International Classification:
H01L 21331
US Classification:
438375, 438349, 257197
Abstract:
In one disclosed embodiment, a collector is deposited and a base is grown on the collector, for example, by epitaxially depositing either silicon or silicon-germanium. An emitter is fabricated on the base followed by implant doping an extrinsic base region. For example, the extrinsic base region can be implant doped using boron. The extrinsic base region doping diffuses out during subsequent thermal processing steps in chip fabrication, creating an out diffusion region in the device, which can adversely affect various operating characteristics, such as parasitic capacitance and linearity. The out diffusion is controlled by counter doping the out diffusion region. For example, the counter doped region can be implant doped using arsenic or phosphorous. Also, for example, the counter doped region can be formed using tilt implanting or, alternatively, by implant doping the counter doped region and forming a spacer on the base prior to implanting the extrinsic base region.

Methods And Apparatus For A Composite Collector Double Heterojunction Bipolar Transistor

View page
US Patent:
6563145, May 13, 2003
Filed:
Dec 29, 1999
Appl. No.:
09/474624
Inventors:
Charles E. Chang - Newbury Park CA, 91320
Richard L. Pierson - Thousand Oaks CA, 91360
Peter J. Zampardi - Westlake Village CA, 91361
Peter M. Asbeck - San Diego CA, 92130
International Classification:
H01L 29739
US Classification:
257197, 257200, 438 35, 438235, 438342, 438796
Abstract:
A compound collector double heterojunction bipolar transistor (CCHBT) incorporates a collector comprising two layers: a wide bandgap collector region (e. g. , GaAs), and a narrow bandgap collector region (e. g. , InGaP). The higher electric field is supported in the wide bandgap region, thereby increasing breakdown voltage and reducing offset voltage. At the same time, the use of wide bandgap material in the depleted portion of the collector, and a higher mobility material toward the end and outside of the depletion region, reduces series resistance as well as knee voltage.

Gallium Nitride-Based Hfet And A Method For Fabricating A Gallium Nitride-Based Hfet

View page
US Patent:
6624452, Sep 23, 2003
Filed:
Jul 30, 2001
Appl. No.:
09/918306
Inventors:
Edward T. Yu - San Diego CA
Peter M. Asbeck - San Diego CA
Silvanus S. Lau - San Diego CA
Xiaozhong Dang - Fremont CA
Assignee:
The Regents of the University of California - Oakland CA
International Classification:
H01L 31072
US Classification:
257194, 257192, 257615
Abstract:
A GaN-based HFET includes a set of layers all having a common face polarity, i. e. , all being either Ga-face or N-face. One of the layers is a thin barrier layer having a first face with a positive charge and a second face with a negative charge thereby causing a potential change to occur between the two faces. The if potential change causes the barrier layer to prevent electron flow from a channel layer into a buffer layer. The GaN-based HFET may also be fabricated without a top barrier layer to obtain an inverted GaN-based HFET.

Hbt With Nitrogen-Containing Current Blocking Base Collector Interface And Method For Current Blocking

View page
US Patent:
6674103, Jan 6, 2004
Filed:
Jul 31, 2001
Appl. No.:
09/919367
Inventors:
Charles W. Tu - La Jolla CA
Peter M. Asbeck - San Diego CA
Kazuhiro Mochizuki - Nagasaki, JP
Rebecca Welty - La Jolla CA
Assignee:
The Regents of the University of California - Oakland CA
International Classification:
H01L 310328
US Classification:
257197, 257183, 257 76
Abstract:
An improved HBT of the invention reduces the current blocking effect at the base-collector interface. Nitrogen is incorporated at the base-collector interface in an amount sufficient to reduce the conduction band energy of the collector at the base-collector interface to equal the conduction band energy of the base. In a preferred embodiment, a nitrogen concentration on the order of 2% is used in a thin Ë20 nm layer at the base-collector interface. Preferred embodiment HBTs of the invention include both GaAs HBTs and InP transistors in various layer structures, e. g. , single and double heterojunction bipolar transistors and blocked hole bipolar transistors.

Substrate Driven Field-Effect Transistor

View page
US Patent:
7439556, Oct 21, 2008
Filed:
Mar 29, 2005
Appl. No.:
11/093592
Inventors:
Berinder P. S. Brar - Newbury Park CA, US
Peter M. Asbeck - San Diego CA, US
Assignee:
ColdWatt, Inc. - Austin TX
International Classification:
H01L 31/0328
US Classification:
257194
Abstract:
A substrate driven field effect transistor (FET) and a method of forming the same. In one embodiment, the substrate driven FET includes a substrate having a source contact covering a substantial portion of a bottom surface thereof and a lateral channel above the substrate. The substrate driven FET also includes a drain contact above the lateral channel. The substrate driven FET still further includes a source interconnect that connects the lateral channel to the substrate operable to provide a low resistance coupling between the source contact and the lateral channel.

Correlation Method For Monitoring Power Amplifier

View page
US Patent:
7652532, Jan 26, 2010
Filed:
Sep 5, 2006
Appl. No.:
11/515584
Inventors:
Mingyuan Li - La Jolla CA, US
Peter Asbeck - Del Mar CA, US
Ian Galton - Del Mar CA, US
Lawrence E. Larson - Del Mar CA, US
Assignee:
The Regents of the University of California - Oakland CA
International Classification:
H03F 1/32
US Classification:
330149, 4551152
Abstract:
The invention provides methods and devices for estimating power amplifier nonlinearity using simple correlation techniques. Methods and devices of the invention can monitor a power amplifier that has digitally modulated inputs and an output containing more than one signal stream. A preferred method of the invention creates a test signal by forming the products of several pseudorandom noise sequences from the digitally modulated inputs to the power amplifier. Nonlinear contributions of the power amplifier output are determined by cross-correlating the test signal and the total output signal of the power amplifier. In preferred embodiments, the determined nonlinear contributions of the power amplifier are used to introduce corrective predistortion in the power amplifier.

Radio Transmission Frequency Digital Signal Generation

View page
US Patent:
7953174, May 31, 2011
Filed:
Mar 19, 2003
Appl. No.:
10/392290
Inventors:
Peter M. Asbeck - San Diego CA, US
Ian Galton - Del Mar CA, US
Assignee:
The Regents of the University of California - Oakland CA
International Classification:
H04L 27/00
US Classification:
375295, 375307
Abstract:
The invention is directed to digital generation of RF signals. In the digital domain, digital RF signals are converted to the digital signals clocked at a high speed clock that is phase-synchronized with the RF carrier. A band-pass delta-sigma modulator produces a bit stream from the converted digital signals.

Low Voltage Transistors

View page
US Patent:
8148718, Apr 3, 2012
Filed:
Jun 2, 2008
Appl. No.:
12/156547
Inventors:
Peter Asbeck - Del Mar CA, US
Lingquan Wang - La Jolla CA, US
Assignee:
The Regents of the University of California - Oakland CA
International Classification:
H01L 29/15
US Classification:
257 27, 257192, 257200, 257E49001, 257E29081, 257E29091
Abstract:
The invention provides a transistor having a substrate, a structure supported by the substrate including a source, drain, gate, and channel, wherein the source and the channel are made of different materials, and a tunnel junction formed between the source and the channel, whereby the tunnel junction is configured for injecting carriers from the source to the channel.

Wikipedia References

Peter Asbeck Photo 1

Peter Asbeck

Peter Asbeck Photo 2

Peter Van Asbeck

Peter M Asbeck from San Diego, CA, age ~77 Get Report