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Peruvamba Hariharan Phones & Addresses

  • 6025 Bohde Trl, Fort Wayne, IN 46835 (574) 727-0276
  • Milpitas, CA

Work

Position: Construction and Extraction Occupations

Education

Degree: Graduate or professional degree

Publications

Us Patents

Methods And Apparatus For Improving Frequency Response Of Integrated Rc Filters With Additional Ground Pins

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US Patent:
57606625, Jun 2, 1998
Filed:
Feb 28, 1996
Appl. No.:
8/608433
Inventors:
Jeffrey Clifford Kalb - Saratoga CA
Peruvamba Hariharan - Milpitas CA
Anguel Svilenov Brankov - San Jose CA
Assignee:
California Micro Devices Corporation - Milpitas CA
International Classification:
H03J 102
US Classification:
333172
Abstract:
A Quarter Size Small Outline Packages (QSOP) integrated resistor/capacitor network. The QSOP integrated resistor/capacitor network includes resistor/capacitor filters implemented in a QSOP package in integrated form. In one embodiment, the QSOP integrated resistor/capacitor network includes at least six ground pins for coupling capacitors of the resistor/capacitor filters with a common ground to maximize the attenuation of ultra-high frequency signals filtered through the resistor/capacitor filters.

Integrated Resistor Networks Having Reduced Cross Talk

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US Patent:
56524609, Jul 29, 1997
Filed:
Oct 6, 1995
Appl. No.:
8/539935
Inventors:
Jeffrey Clifford Kalb - Saratoga CA
Peruvamba Hariharan - Milpitas CA
John Dericourt Hurd - San Jose CA
Gregg Duncan - Morgan Hill CA
Assignee:
California Micro Devices Corporation - Milpitas CA
International Classification:
H01L 2900
H01L 2170
US Classification:
257536
Abstract:
An integrated circuit for implementing a resistor network on a die of the integrated circuit. The integrated circuit includes a common conductor, which is disposed on a first side of the die and coupled to resistors of the resistor network. The integrated circuit further includes a substantially conductive substrate through the die. There is further included a conductive back side contact coupled to the substantially conductive substrate. The conductive back side contact is disposed on a second side of the die opposite the first side, whereby the common conductor, the substantially conductive substrate, and the conductive back side contact form a common conducting bus from the common conductor to the conductive back side contact through the die.

Switched Capacitor Circuit With Minimized Switched Capacitance

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US Patent:
45435464, Sep 24, 1985
Filed:
Apr 20, 1983
Appl. No.:
6/486664
Inventors:
Peruvamba R. Hariharan - Fort Wayne IN
Assignee:
Magnavox Government and Industrial Electronics Company - Fort Wayne IN
International Classification:
H03H 1112
US Classification:
333173
Abstract:
A circuit for monolithic or film stratum is adapted to have circuit capacitances integrated therein and having a minimum unit capacitance (MUC), or smallest practical capacitance that can be fabricated therein. Circuits are provided that have in one circuit arm a capacitor having a first capacity and in a second circuit arm a number N of series connected switched capacitors having a second or terminal capacity, or effective capacity between the end terminals of the second arm, that is less than the first capacity. The first capacity and second capacity form a ratio R, which is the factor by which the first capacity is greater than the second capacity. Switching is provided for each plate of each of the series connected capacitors and at the end terminals of the second arm to alternately connect the second arm into the circuit and to discharge the series connected capacitors which minimizes the effects of parasitic capacitances. Each series connected switched capacitor of the second circuit arm may have a capacity of substantially one MUC so that the terminal capacity of the second circuit arm is (1/N) MUCs and the first capacity is (R/N) MUCs. The total capacitance, or circuit capacitance, that is integrated into the stratum is (N+R/N) MUCs.

Switched Capacitor Waveform Processing Circuit

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US Patent:
49707035, Nov 13, 1990
Filed:
May 10, 1984
Appl. No.:
6/608873
Inventors:
Peruvamba R. Hariharan - Fort Wayne IN
Robert W. Downing - Fort Wayne IN
Assignee:
Magnavox Government and Industrial Electronics Company - Fort Wayne IN
International Classification:
G01S 380
US Classification:
367138
Abstract:
Waveform inputs are sampled to provide vector inputs which are coupled to respective ones of a plurality of series connected time delay stages in a processing circuit. Each vector is weighted, or amplified, and time delayed by each stage between its input point and the circuit output. Each stage has switched capacitors and an operational amplifier. The delay of each stage is the period of the capacitor switching frequency. All of the components in the stages and vector input circuitry are solid state switches, capacitors or operational amplifiers and therefore are especially suitable for integration in a monolithic or film substrate. The circuit is particularly adapted to beam steering a plurality of waveform inputs from an array of hydrophones.
Peruvamba R Hariharan from Fort Wayne, IN, age ~86 Get Report