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Pawan Dhanrajani Phones & Addresses

  • 192 N Route 303 #6, Congers, NY 10920 (845) 267-8827
  • 100 Edison Ct, Monsey, NY 10952 (845) 356-2862
  • 52 Edison Ct, Monsey, NY 10952
  • Pearl River, NY
  • Plantation, FL
  • Durham, NC
  • 192 N Route 303 UNIT 6, Congers, NY 10920

Work

Company: Nistica May 2016 to Jan 2018 Position: Firmware design engineer

Education

Degree: Graduate or professional degree

Skills

C/C++ • Assembly Language • Bsp • Device Drivers • Ose • Psos • Otn • Sonet/Sdh • Clearcase • Ethernet • Gpon • Embedded Software • Tl1 • Rtp • Tcp/Ip • Unix • Perl • Eclipse • Debugging • Jtag Bdms • Qnx • Python • Rtos • Sdh • Embedded Systems • Software Development • Firmware • Integration • Telecommunications • C++ • Real Time Operating Systems • Synchronous Digital Hierarchy

Industries

Telecommunications

Resumes

Resumes

Pawan Dhanrajani Photo 1

Senior Software Engineer

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Location:
1003 Bishop St, Honolulu, HI 96813
Industry:
Telecommunications
Work:
Nistica May 2016 - Jan 2018
Firmware Design Engineer

Nokia Bell Labs May 2016 - Jan 2018
Senior Software Engineer

Fujitsu Network Communications Feb 2013 - May 2016
Senior Firmware Design Engineer

Fujitsu Network Communications Jun 1998 - Jan 2013
Senior Software Engineer

Racal Datacom 1997 - 1998
Senior Software Engineer
Skills:
C/C++
Assembly Language
Bsp
Device Drivers
Ose
Psos
Otn
Sonet/Sdh
Clearcase
Ethernet
Gpon
Embedded Software
Tl1
Rtp
Tcp/Ip
Unix
Perl
Eclipse
Debugging
Jtag Bdms
Qnx
Python
Rtos
Sdh
Embedded Systems
Software Development
Firmware
Integration
Telecommunications
C++
Real Time Operating Systems
Synchronous Digital Hierarchy

Business Records

Name / Title
Company / Classification
Phones & Addresses
Pawan Dhanrajani
Senior Software Engineer, Director of Engineering, Manager
Fujitsu Network Communications Inc
Mfg Telephone/Telegraph Apparatus Commercial Physical Research Mfg Radio/TV Communication Equipment
2 Blue Hl Plz, Chestnut Ridge, NY 10965
(845) 731-2000

Publications

Us Patents

Minimizing Isr Latency And Overhead

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US Patent:
20070112987, May 17, 2007
Filed:
Nov 14, 2005
Appl. No.:
11/271772
Inventors:
Sanjay Sharma - Wayne NJ, US
Pawan Dhanrajani - Monsey NY, US
Michael Bottiglieri - Rivervale NJ, US
Jaya Sarup - Monroe NY, US
Zafrir Babin - Glen Rock NJ, US
Dorin Dogaroiu - Woodside NY, US
International Classification:
G06F 13/24
US Classification:
710261000
Abstract:
The capability to handle the 100 μs RPR interrupt and similar interrupts is provided by servicing selected interrupts outside of the operating system. This drastically reduces the latency and overhead associated with servicing the interrupt. A method of handling an interrupt in a computer system comprises receiving the interrupt at the computer system, determining whether the interrupt is a selected interrupt, and performing interrupt processing not involving an operating system of the computer system, if the interrupt is a selected interrupt.
Pawan Kumar Dhanrajani from Congers, NY, age ~56 Get Report