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Paul Alan Spitalny

from Seattle, WA
Age ~67
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Also known as:
Paul A Spitalny, Paul A Spitalney
Phone and address:
4129 Sunnyside Ave, Seattle, WA 98103
(206) 632-6948
Related to:
Jacqueline Dawn Johnson, 56Joseph Conway, 52Paul S Archibeque, 67Tanya Dondanville, 60Kay Sedor, 83Frances Archibeque, 88
Connected to:
Arlen L Spitalnik, 37Gloria S Spitalny, 79Ian H Spitalnick, 42Ilana D Spitalnick, 36Craig A Spite, 42Joseph Spite, 36Brenda L Spitek, 45Blaise Spiteri, 43Caty L Spiteri, 47Erika Spiteri, 46

Paul Spitalny Phones & Addresses

  • 4129 Sunnyside Ave, Seattle, WA 98103 (206) 632-6948 (206) 632-6949
  • 720 3Rd St, Kirkland, WA 98033 (425) 828-6948 (425) 828-7147
  • Redmond, WA
  • Everett, WA
  • Boston, MA
  • Scarsdale, NY
  • Mukilteo, WA

Work

Company: Cascade linear integrated circuits Address: 720 3Rd St. S, Kirkland, WA 98033 Phones: (425) 828-6948 Position: Manager Industries: Eating Places

Skills

Analog and Mixed Signal Ic Design • Mixed Signal • Analog • Ic • Asic • Audio • Analog Design • Pcb Design • Analog Circuit Design • Sound • Mixed Signal Ic Design • Mems • Electronics • Signal Processing • Cmos

Languages

English

Interests

Civil Rights and Social Action • Environment • Science and Technology • Human Rights • Health

Industries

Semiconductors

Resumes

Resumes

Paul Spitalny Photo 1

Paul Spitalny

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Location:
Seattle, WA
Industry:
Semiconductors
Skills:
Analog and Mixed Signal Ic Design
Mixed Signal
Analog
Ic
Asic
Audio
Analog Design
Pcb Design
Analog Circuit Design
Sound
Mixed Signal Ic Design
Mems
Electronics
Signal Processing
Cmos
Interests:
Civil Rights and Social Action
Environment
Science and Technology
Human Rights
Health
Languages:
English

Business Records

Name / Title
Company / Classification
Phones & Addresses
Paul Spitalny
Manager
Cascade Linear Integrated Circuits
Eating Places
720 3Rd St. S, Kirkland, WA 98033
Paul A. Spitalny
President
Cascade Linear, Inc
Business Consulting Services
4129 Sunnyside Ave N, Seattle, WA 98103
Paul Spitalny
Manager
Cascade Linear Integrated Circuits
Eating Places
720 3Rd St. S, Kirkland, WA 98033

Publications

Us Patents

Large Common Mode Input Range Cmos Amplifier

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US Patent:
55744010, Nov 12, 1996
Filed:
Jun 2, 1995
Appl. No.:
8/460084
Inventors:
Paul A. Spitalny - Everett WA
Assignee:
Analog Devices, Inc. - Norwood MA
International Classification:
H03F 345
US Classification:
330253
Abstract:
A CMOS amplifier input stage including an NMOS differential pair connected in parallel with a PMOS differential pair. Each pair is connected to a tail-current transistor of the same type, and the combined circuits are coupled between positive and negative supply rails. The gates of the tail-current transistors receive the amplifier input signal to provide adaptive biasing of the differential pairs, resulting in a total combined transconductance for both differential pairs which is at least approximately constant with changes in input signal level, thereby enlarging the available common-mode input signal range of the amplifier.

Programmable Gain Amplifier

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US Patent:
54867916, Jan 23, 1996
Filed:
Jan 29, 1993
Appl. No.:
8/011106
Inventors:
Paul Spitalny - Allston MA
Martin Mallinson - Billerica MA
Assignee:
Analog Devices, Inc. - Norwood MA
International Classification:
H03G 330
US Classification:
330282
Abstract:
A programmable gain amplifier including first and second gain elements are connected by an impedance selector which allows programmability of the gain of both gain elements. The impedance selector is connected in series with the output of the first gain element. The impedance selector places an impedance in the feedback path of the first gain element or the input path of the second gain element. Errors introduced in the signal path due to the switches are attenuated by the open loop gain of the first gain element. The gain may be equally divided between both stages of the amplifier to allow for optimum band width. Optimum noise performance may be obtained by placing most of the gain in the first stage. An instrumentation amplifier may also be made which further includes a third gain element connected to the gain element with a second impedance selector in a manner similar to the connection of the first gain element to the second gain element.

Programmable Gain Amplifier

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US Patent:
52333094, Aug 3, 1993
Filed:
Jan 9, 1992
Appl. No.:
7/819376
Inventors:
Paul Spitalny - Allston MA
Martin Mallinson - Billerica MA
Assignee:
Analog Devices, Inc. - Norwood MA
International Classification:
H03G 300
H03F 368
US Classification:
330 84
Abstract:
A programmable gain amplifier including first and second gain elements are connected by an impedance selector which allows programmability of the gain of both gain elements. The impedance selector is connected in series with the output of the first gain element. The impedance selector places an impedance in the feedback path of the first gain element or the input path of the second gain element. Errors introduced in the signal path due to the switches are attenuated by the open loop gain of the first gain element. The gain may be equally divided between both stages of the amplifier to allow for optimum band width. Optimum noise performance may be obtained by placing most of the gain in the first stage. An instrumentation amplifier may also be made which further includes a third gain element connected to the gain element with a second impedance selector in a manner similar to the connection of the first gain element to the second gain element.
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Paul Alan Spitalny from Seattle, WA, age ~67 Get Report