Norman E Raver

50043170, Apr 2, 1991

Jan 3, 1990

7/460418

Kenneth P. Jackson - Danbury CT
Norman Raver - Yorktown Heights NY

International Business Machines Corp. - Armonk NY

G02B 636
H08K 118

350 9620

In an electrical circuit including a first array and a second array of electrical components mounted on a circuit board having an electrically conductive cladding, there is provided a system for interconnecting the components of the first array to the components of the second array with parallel signal channels for reduction of crosstalk among the channels. In each of the channels, there is one electrically conductive strip formed within the cladding and providing for a path of current in a first direction, and a second conductive path for current in the reverse direction. The second path includes a wire lead formed as a partial loop extending in a plane perpendicular to a plane of the cladding, and also includes a pad formed of material of the cladding and coplanar with the conductive strip. The pad is connected to a terminus of the wire loop. The pad is insulated from the conductive strip and forms therewith a portion of a loop which generates a magnetic field in the presence of currents flowing through the two paths.

44687320, Aug 28, 1984

Apr 28, 1980

6/144116

Norman Raver - Yorktown Heights NY

International Business Machines Corporation - Armonk NY

G06F 700

364200

An associative file design method and apparatus are used for automatically generating an integrated data base design structure, with minimal data redundancy, for use in multi-application general purpose digital computing systems. The integrated data base design structure is automatically produced by a programmed digital computer in the form of a report or graph structure which permits the data base designer to design a data base system with minimal data redundancy. The data needed by each application program, i. e. , the local data view, is specified with certain constructs. The local data views are checked to ensure that specified rules are followed. The collection of local views is processed on a general purpose digital computer to separate "keys" from "attributes," then to determine "implied" and "essential" associations, and finally to generate the integrated data base graph structure.

45673780, Jan 28, 1986

Jun 13, 1984

6/620235

Norman Raver - Yorktown Heights NY

International Business Machines Corporation - Armonk NY

H03K 301
H03K 17687

307270

An off-chip driver (OCD) circuit is described including a first output device and a second output device having a common output connection wherein a rising (1 bit) or falling (0 bit) signal is applied through an input circuit 24 to the output devices. The output signal which appears at the common output connection will exhibit a rise time and a fall time corresponding to the rise and fall of the input signal. A first monitoring device is connected to the output signal to monitor the rise time of the output signal and a second monitoring device is connected to the output signal to monitor the fall time of the output signal. A ramp generator is provided which generates a reference signal which also includes a rise time and a fall time. The two monitor circuits and compare the rise and fall times of the output signal with the reference rise time and reference fall time to produce a feedback signal to control the rise and fall times of the output signal in accordance with the reference signal.

46267050, Dec 2, 1986

Jun 14, 1984

6/620765

Norman Raver - Yorktown Heights NY

International Business Machines Corporation - Armonk NY

H03K 1714

307269

A circuit for generating accurate timing pulses which includes a timer means, a reference and feedback amplifier means, a feedback difference amplifier means, a difference amplifier means and a pulse shaper means. The timer means includes a constant current source which is triggered on by the input waveform signal and produces current i. sub. c. Reference and feedback amplifier means generates a voltage V. sub. ref which is proportional to current i. sub. c. Thus, if i. sub. c is too high or too low, V. sub. ref will represent the error value. The d. c. reference signal V. sub. ref' is applied to the feedback difference amplifier means which is a typical dynamic detector circuit. Feedback difference amplifier circuit is triggered and changes state when the voltage of the constant current timing circuit (which is proportional to i. sub. c) equals the reference voltage V. sub. ref'. The output signal from feedback difference amplifier means is applied to the straightforward difference amplifier means for further amplification.

47000864, Oct 13, 1987

Apr 23, 1985

6/726211

Daniel T. Ling - Croton-on-Hudson NY
Vojin G. Oklobdzija - Carmel NY
Norman Raver - Yorktown Heights NY

International Business Machines Corporation - Armonk NY

H03K 19003
H03K 19096

307443

A precharge circuit for a cascode voltage switch in which at the beginning of the precharge phase the output state is memorized and the output is isolated from the precharging points. Both the positive and negative ends of the discharge paths are precharged with the gates of the switches in all paths held in their memorized states. Towards the end of precharging, the output is reconnected to the normal precharging point so that it goes low. Then the positive and negative precharging points are reconnected for their evaluation configuration.