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Noah A Sturcken

from New York, NY
Age ~38
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Also known as:
Noah Andrew Sturcken, Noah K Sturcken, Noah B, Noah R
Related to:
Melanie Spackman, 66Wade Johnson, 67Brittany C Cronin, 39Angela Laird, 44Melissa Fotheringham, 39
Connected to:
Janine M Sturdavant, 69Jessica Sturdavant, 37Bryant N Sturdevant, 36Cathy Sturdevant, 62Daniel R Sturdevant, 55Gary F Sturdevant, 89Harmony L Sturdevant, 46Janis Sturdevant, 69Katherine S Sturdevant, 69Maureen L Sturdevant, 72

Noah Sturcken Phones & Addresses

  • New York, NY
  • 195 N View Cir, Warrenton, VA 20186
  • Ithaca, NY
  • Sunnyvale, CA
  • Nokesville, VA
  • Manassas, VA

Work

Company: Ferric semiconductor Oct 2011 Address: New York Position: Cto

Education

School / High School: Columbia University In the City of New York 2008 to 2012 Specialities: Electrical Engineering

Skills

Cmos • Circuit Design • Simulations • Matlab • Verilog • Semiconductors • Ic • Asic • Vlsi • Perl • Analog Circuit Design • Fpga • Computer Architecture • Linux • Algorithms • Vhdl • C

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Noah Sturcken Photo 1

President And Chief Executive Officer

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Location:
155 west 121St St, New York, NY 10027
Industry:
Electrical/Electronic Manufacturing
Work:
Ferric Semiconductor - New York since Oct 2011
CTO
Education:
Columbia University In the City of New York 2008 - 2012
Columbia Engineering 2008 - 2009
Master of Science, Masters, Electrical Engineering Cornell University 2004 - 2008
Bachelors, Bachelor of Science, Computer Engineering
Skills:
Cmos
Circuit Design
Simulations
Matlab
Verilog
Semiconductors
Ic
Asic
Vlsi
Perl
Analog Circuit Design
Fpga
Computer Architecture
Linux
Algorithms
Vhdl
C

Business Records

Name / Title
Company / Classification
Phones & Addresses
Noah Sturcken
Principal
Ferric Semiconductor, Inc
Mfg Semiconductors/Related Devices
155 W 121 St, New York, NY 10027
3111 Broadway, New York, NY 10027

Publications

Us Patents

Circuit Board With Integrated Voltage Regulator

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US Patent:
20130257525, Oct 3, 2013
Filed:
Mar 30, 2012
Appl. No.:
13/436195
Inventors:
Stephen V. Kosonocky - Fort Collins CO, US
Noah Sturcken - New York NY, US
International Classification:
G05F 1/10
H05K 3/30
US Classification:
327540, 29832
Abstract:
Various circuit board voltage regulators and methods of making and using the same are disclosed. In one aspect, a method of manufacturing is provided that includes fabricating at least one inductor in a circuit board and coupling a semiconductor chip to the circuit board. The at least one inductor is electrically coupled to the semiconductor chip. Regulator logic is electrically coupled to the at least one inductor, the regulator logic and the at least one inductor are operable to deliver a regulated voltage to the semiconductor chip.

Magnetic Core Inductor Integrated With Multilevel Wiring Network

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US Patent:
20140068932, Mar 13, 2014
Filed:
Sep 13, 2012
Appl. No.:
13/613011
Inventors:
Noah Andrew Sturcken - New York NY, US
Assignee:
FERRIC SEMICONDUCTOR, INC. - New York NY
International Classification:
H05K 3/30
US Classification:
29832
Abstract:
An inductor is integrated into a multilevel wiring network of a semiconductor integrated circuit. The inductor includes a planar magnetic core and a conductive winding. The conductive winding turns around in generally spiral manner on the outside of the planar magnetic core. The conductive winding is piecewise constructed of wire segments and of VIAs. The wire segments pertain to at least two wiring planes and the VIAs are interconnecting the at least two wiring planes. Methods for such integration, and for fabricating laminated planar magnetic cores are also presented.

Magnetic Core Inductor Integrated With Multilevel Wiring Network

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US Patent:
20140071636, Mar 13, 2014
Filed:
Sep 11, 2012
Appl. No.:
13/609391
Inventors:
Noah Andrew Sturcken - New York NY, US
Assignee:
FERRIC SEMICONDUCTOR, INC. - New York NY
International Classification:
H05K 1/18
H01F 5/00
US Classification:
361748, 336200
Abstract:
An inductor is integrated into a multilevel wiring network of a semiconductor integrated circuit. The inductor includes a planar magnetic core and a conductive winding. The conductive winding turns around in generally spiral manner on the outside of the planar magnetic core. The conductive winding is piecewise constructed of wire segments and of VIAs. The wire segments pertain to at least two wiring planes and the VIAs are interconnecting the at least two wiring planes. Methods for such integration, and for fabricating laminated planar magnetic cores are also presented.

One-Sided Parallel Llc Power Converter

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US Patent:
20210265915, Aug 26, 2021
Filed:
Feb 25, 2020
Appl. No.:
16/800276
Inventors:
- New York NY, US
Noah Sturcken - New York NY, US
Denis Shishkov - Brooklyn NY, US
Michael Lekas - Brooklyn NY, US
International Classification:
H02M 3/335
H02M 1/08
Abstract:
A power converter includes a primary circuit and a secondary circuit. The primary circuit includes two primary LC circuits that are in parallel electrically with each other. A first node of each primary LC circuit is electrically coupled to a high-voltage input. A second node of each primary LC circuit is coupled to a respective terminal of a primary inductor that forms a transformer with a secondary inductor in the secondary circuit. Each primary LC circuit is electrically coupled to a primary switch that operates at approximately the resonance frequency of the primary LC circuits to output an alternating current that passes through the primary inductor. The terminals of the secondary inductor are coupled to respective secondary switches. The switches operate at the resonance frequency of the primary LC circuit to rectify the power. A low-pass filter outputs the mean of the received voltage.

Compact Transceiver On A Multi-Level Integrated Circuit

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US Patent:
20200168394, May 28, 2020
Filed:
Jan 31, 2020
Appl. No.:
16/778154
Inventors:
- New York NY, US
Noah Sturcken - New York NY, US
International Classification:
H01F 38/14
H04B 5/00
H01F 27/24
H01L 23/64
H02J 50/12
Abstract:
Power and/or data are transmitted through variable magnetic fields between a first transceiver coil on a transceiver apparatus and a second transceiver coil in an inductor integrated into a multilevel wiring structure on a semiconductor integrated circuit chip. The first transceiver apparatus generates magnetic fields and can transmit data by varying a characteristic of the magnetic fields. The second transceiver coil receives the power from and/or detects data in the magnetic fields from the first transceiver apparatus. The inductor can include a ferromagnetic core that concentrates magnetic flux to improve data or power transmission efficiency to miniaturize the second transceiver coil while maintaining adequate inductive coupling between the coils. The second transceiver coil can transmit data by varying the impedance of the inductor and/or the integrated circuit. The semiconductor integrated circuit chip can be coupled to an object and the second transceiver coil can transmit data relating to the object.

Compact Transceiver On A Multi-Level Integrated Circuit

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US Patent:
20200075233, Mar 5, 2020
Filed:
Aug 30, 2018
Appl. No.:
16/118113
Inventors:
- New York NY, US
Noah Sturcken - New York NY, US
International Classification:
H01F 38/14
H01L 23/64
H02J 50/12
H01F 27/24
H04B 5/00
Abstract:
Power and/or data are transmitted through variable magnetic fields between a first transceiver coil on a transceiver apparatus and a second transceiver coil in an inductor integrated into a multilevel wiring structure on a semiconductor integrated circuit chip. The first transceiver apparatus generates magnetic fields and can transmit data by varying a characteristic of the magnetic fields. The second transceiver coil receives the power from and/or detects data in the magnetic fields from the first transceiver apparatus. The inductor can include a ferromagnetic core that concentrates magnetic flux to improve data or power transmission efficiency to miniaturize the second transceiver coil while maintaining adequate inductive coupling between the coils. The second transceiver coil can transmit data by varying the impedance of the inductor and/or the integrated circuit. The semiconductor integrated circuit chip can be coupled to an object and the second transceiver coil can transmit data relating to the object.

Zero-Voltage Switch-Mode Power Converter

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US Patent:
20180145592, May 24, 2018
Filed:
Jan 12, 2018
Appl. No.:
15/869726
Inventors:
- New York NY, US
David Jew - New York NY, US
Joseph Meyer - New York NY, US
Noah Sturcken - New York NY, US
International Classification:
H02M 3/158
H02M 3/157
H02M 1/00
Abstract:
A switched-mode power converter includes timing control feedback loop circuits to minimize or eliminate the potential difference across a high-power switch and a low-power switch during their transitions times. A first feedback circuit compares the measured voltage across the high-power switch at the moment the high-power switch closes with the input voltage to the high-power switch to control a low-to-high delay time. A second feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch closes with the input voltage to the low-power switch to control a high-to-low delay time. A third feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch opens. The output of the third feedback circuit is provided as inputs to the first and second feedback circuits. The third feedback circuit also controls the frequency of the power converter.

Magnetic Core Inductor Integrated With Multilevel Wiring Network

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US Patent:
20180139846, May 17, 2018
Filed:
Dec 20, 2017
Appl. No.:
15/848884
Inventors:
- New York NY, US
Noah Andrew Sturcken - New York NY, US
International Classification:
H05K 1/18
H01F 41/04
H01F 41/02
H01F 27/28
H01F 27/24
H05K 1/16
H05K 1/02
H05K 1/11
Abstract:
An inductor is integrated into a multilevel wiring network of a semiconductor integrated circuit. The inductor includes a planar magnetic core and a conductive winding. The conductive winding turns around in generally spiral manner on the outside of the planar magnetic core. The conductive winding is piecewise constructed of wire segments and of VIAs. The wire segments pertain to at least two wiring planes and the VIAs are interconnecting the at least two wiring planes. Methods for such integration, and for fabricating laminated planar magnetic cores are also presented.
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Noah A Sturcken from New York, NY, age ~38 Get Report