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Nishant Lakhera

from Austin, TX
Age ~40
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Also known as:
Lakhera Nishant
Phone and address:
8500 High Summit Ln, Austin, TX 78737
Related to:
Shraddha Lakhera, 37Shruti Dwivedi, 41
Connected to:
Sandeep K Lakhera, 40Mani D Lakhi, 89Sanjiv S Lakhia, 80Saurin D Lakhia, 43Harinder S Lakhian, 68Natasha M Lakhiani, 57Prakash D Lakhiani, 43Ravinderpal S Lakhian, 60Parul P Lakhlani, 61Sergey Lakhno, 50

Nishant Lakhera Phones & Addresses

  • 8500 High Summit Ln, Austin, TX 78737
  • Laramie, WY

Resumes

Resumes

Nishant Lakhera Photo 1

Ic Packaging Engineering Manager

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Location:
Bloomington, IN
Industry:
Semiconductors
Work:
University of Wyoming - Laramie, WY Aug 2009 - Jun 2013
Ph.D Graduate Research Assistant (Materials Science, Polymer Science, Mechanical Engineering)
University of Wyoming - Laramie, WY Aug 2009 - May 2013
Graduate Teaching Assistant
University of Wyoming - Laramie, WY Jan 2010 - Dec 2011
Independent Study Research Mentor
University of Wyoming - Laramie, WY Aug 2007 - May 2009
M.S. Graduate Research Assistant
Bharat Heavy Electricals Limited - Haridwar Area, India May 2004 - Aug 2004
Engineering Intern
Education:
University of Wyoming 2009 - 2013
Ph.D., Mechanical Engineering, Material Sciences, Polymers University of Wyoming 2006 - 2009
MS, Mechanical Engineering Uttar Pradesh Technical University 2002 - 2006
B.Tech, Mechanical Engineering St. Joseph's Academy
Skills:
Materials Science
Design of Experiments
Matlab
Polymers
Failure Analysis
Microsoft Office
Ftir
Research
Mechanical Testing
Polymer Science
Leadership
Solidworks
Data Analysis
Cross Functional Team Leadership
Scanning Electron Microscopy
Polymer Characterization
Technical Writing
Experimentation
Dynamic Mechanical Analysis
Structure Property Relationships
Viscoelasticity
Adhesives
Originlab
Polymer Nanocomposites
Polymer Composites
Tensile Testing
Smart Materials
Thermoset
Thermoplastic
Elastomers
Shape Memory Polymers
Research Analysis
Research Writing
Technical Documentation
Fast Learner
Hard Worker
Experimental Design
Polymer Physics
Interpersonal Skill
Communication Skills
Adobe Acrobat
Mathematical Analysis
Multi Tasking
Uv Curing
Statistical Data Analysis
Coatings Technology
Interests:
New Technology
Cooking
Adventure
Soccer
Footballl
Cricket
Music
Languages:
English
Hindi
Nishant Lakhera Photo 2

Dynamic Professional Skilled In Polymer Science/Material Science Exploring New Career Opportunities.

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Position:
Ph.D Graduate Research Assistant (Materials Science, Polymer Science, Mechanical Engineering) at University of Wyoming, Graduate Teaching Assistant at University of Wyoming
Location:
Laramie, Wyoming
Industry:
Research
Work:
University of Wyoming - Laramie, WY since Aug 2009
Ph.D Graduate Research Assistant (Materials Science, Polymer Science, Mechanical Engineering)
University of Wyoming - Laramie, WY since Jan 2007
Graduate Teaching Assistant
University of Wyoming - Laramie, WY Jan 2010 - Dec 2011
Independent Study Research Mentor
University of Wyoming - Laramie, WY Aug 2007 - May 2009
M.S. Graduate Research Assistant
Bharat Heavy Electricals Limited - Haridwar Area, India May 2004 - Aug 2004
Engineering Intern
Education:
University of Wyoming 2009 - 2012
Ph.D., Mechanical Engineering, Material Sciences, Polymers University of Wyoming 2006 - 2009
MS, Mechanical Engineering Uttar Pradesh Technical University 2002 - 2006
B.Tech, Mechanical Engineering St. Joseph's Academy
Skills:
Research
Matlab
Materials Science
Mechanical Testing
Dynamic Mechanical Analysis
Structure-property Relationships
Viscoelasticity
Adhesives
OriginLab
Polymers
Polymer Nanocomposites
Polymer Composites
Scanning Electron Microscopy
Polymer Characterization
Failure Analysis
Tensile Testing
Smart Materials
Thermoset
FTIR
Thermoplastic
Elastomers
Polymer Science
Shape memory polymers
Data Analysis
Microsoft Office
Research Analysis
Research Writing
Technical Writing
Technical Documentation
Fast Learner
Hard Worker
Experimental Design
Experimentation
Polymer Physics
Interpersonal Skill
Leadership
Communication Skills
Adobe Acrobat
Cross-functional Team Leadership
Mathematical Analysis
Multi Tasking
UV curing
Design of Experiments
Statistical Data Analysis
Solidworks
Coatings Technology
Interests:
new technology,soccer,cricket,cooking,music,adventure,footballl
Honor & Awards:
• University merit position holder in Mechanical Engineering during B.S. • Recipient of the BEST STUDENT award for three consecutive years as an undergraduate • Undergraduate recipient of the BEST PROJECT award for the Automatic Braking System
Languages:
English
Hindi
Nishant Lakhera Photo 3

Nishant Lakhera Laramie, WY

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Work:
Graduate Teaching Assistant
Aug 2010 to 2000
University of Wyoming

Aug 2009 to 2000
Graduate Research Mentor
M.S. Candidate

Aug 2007 to May 2009
Education:
University of Wyoming
Aug 2009
Ph.D. in Mechanical Engineering
University of Wyoming
Aug 2006 to May 2009
M.S in Mechanical Engineering
Nishant Lakhera Photo 4

Nishant Lakhera Laramie, WY

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Work:
Advanced Materials Laboratory, University of Wyoming, WY

Mar 2010 to 2000
Independent Study Research Mentor
Advanced Materials Laboratory, University of Wyoming, WY

Aug 2009 to 2000
Research Assistant, PhD Candidate
Department of Mechanical Engineering, University of Wyoming, WY

Aug 2007 to May 2009
M.S. Graduate Research Assistant
Department of Mechanical Engineering, University of Wyoming, WY
Laramie, WY
Mar 2007 to May 2007
Graduate Teaching Assistant
Quad Computer Solutions

Aug 2005 to Apr 2006
Consultant
Bharat Heavy Electricals Limited
Haridwar, Uttarakhand
May 2004 to Aug 2004
Engineering Intern
Khodri Hydroelectric Power Plant
Dehra Dun, Uttarakhand
May 2003 to Aug 2003
Engineering Intern
Education:
University of Wyoming
Laramie, WY
Jan 2009 to Jan 2012
Ph.D. in Mechanical Engineering, Polymer science, Material Science
University of Wyoming
Laramie, WY
Jan 2006 to Jan 2009
M.S. Me in Mechanical Engineering
U.P. Technical University
Dehra Dun, Uttarakhand
Jan 2002 to Jan 2006
B.S. Me in Mechanical Engineering
Skills:
Materials Science, Polymer Science, Shape memory polymers, switchable adhesive micropatterned surface, dynamic mechanical analysis, mechanical testing, smart materials, research and development

Publications

Us Patents

Hybrid Package

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US Patent:
20200185319, Jun 11, 2020
Filed:
Feb 14, 2020
Appl. No.:
16/791817
Inventors:
- Austin TX, US
Nishant Lakhera - Austin TX, US
Chee Seng Foong - Austin TX, US
International Classification:
H01L 23/498
H01L 21/48
Abstract:
A method of manufacturing a hybrid package including a flat package and a Wafer Level Chip Scale Package (WLCSP) is disclosed. The method includes fabricating a strip including a plurality of flat packages attached to each other via metal pins, turning the strip upside down, applying a layer of a thermal interface material (TIM) on each of the flat packages while the each of the flat packages is turned upside down, mounting the WLCSP on the layer of the TIM such that a top side of the WLCSP is interfaced with the layer of the TIM, curing the layer of the TIM and singulating each of the flat packages by cutting the metal pins and bending the metal pins.

Hybrid Package

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US Patent:
20200013711, Jan 9, 2020
Filed:
Jul 9, 2018
Appl. No.:
16/030108
Inventors:
- Austin TX, US
Nishant Lakhera - Austin TX, US
Chee Seng Foong - Austin TX, US
International Classification:
H01L 23/498
H01L 21/48
Abstract:
A method of manufacturing a hybrid package including a flat package and a Wafer Level Chip Scale Package (WLCSP) is disclosed. The method includes fabricating a strip including a plurality of flat packages attached to each other via metal pins, turning the strip upside down, applying a layer of a thermal interface material (TIM) on each of the flat packages while the each of the flat packages is turned upside down, mounting the WLCSP on the layer of the TIM such that a top side of the WLCSP is interfaced with the layer of the TIM, curing the layer of the TIM and singulating each of the flat packages by cutting the metal pins and bending the metal pins.

Selectively Shielded Semiconductor Package

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US Patent:
20190103365, Apr 4, 2019
Filed:
Sep 29, 2017
Appl. No.:
15/719668
Inventors:
- Austin TX, US
Nishant Lakhera - Austin TX, US
Navas Khan Oratti Kalandar - Austin TX, US
International Classification:
H01L 23/552
H01L 23/31
H01L 23/66
H01L 23/498
Abstract:
Embodiments for a packaged semiconductor device are provided herein, which includes a substrate; an antenna module attached to a top surface of the substrate, the antenna module including an antenna; an electronic component attached to the top surface of the substrate, the electronic component communicatively coupled to the antenna module through electrical connections in the substrate; a first portion of mold body that encapsulates the antenna module; a second portion of mold body that encapsulates the electronic component, wherein the second portion of mold body is separated from the first portion of mold body by at least a first trench; and a shielding layer that covers the second portion of mold body.

Electronic Component Package With Heatsink And Multiple Electronic Components

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US Patent:
20180114745, Apr 26, 2018
Filed:
Oct 25, 2016
Appl. No.:
15/333580
Inventors:
- AUSTIN TX, US
AKHILESH KUMAR SINGH - AUSTIN TX, US
NISHANT LAKHERA - AUSTIN TX, US
International Classification:
H01L 23/495
H01L 23/31
H01L 21/48
H01L 21/56
H01L 21/78
Abstract:
An electronic component package that includes a heat spreader with a die pad. An electronic component is attached to each side of the die pad where each electronic component includes conductive terminals on a side facing away from the die pad. Conductive terminals of the top electronic component are wirebonded to conductive surfaces of a package substrate and conductive terminals of the bottom electronic component are physically and electrically attached to conductive surfaces of the package substrate. The heat spreader structure includes tie structures that extend in a direction away from the second electronic component.

Stackable Molded Packages And Methods Of Manufacture Thereof

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US Patent:
20180053753, Feb 22, 2018
Filed:
Aug 16, 2016
Appl. No.:
15/237827
Inventors:
- Austin TX, US
Nishant Lakhera - Austin TX, US
Navas Khan Oratti Kalandar - Austin TX, US
International Classification:
H01L 25/10
H01L 25/00
Abstract:
A stackable package assembly and method of manufacturing is provided. The method includes attaching a plurality of interconnect balls to a first surface of a substrate, and encapsulating the first surface of the substrate and the plurality of interconnect balls with an encapsulant. A trench is formed in a first surface of the encapsulant exposing a portion the interconnect balls. An interposer is provided having a first interconnect layer. An assembly is formed by attaching connection sites of a first interconnect layer to the exposed portion of the interconnect balls, the first surface of the second substrate extending into the trench.

Packaged Semiconductor Device Having Bent Leads And Method For Forming

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US Patent:
20170263538, Sep 14, 2017
Filed:
Mar 9, 2016
Appl. No.:
15/064689
Inventors:
- AUSTIN TX, US
Nishant LAKHERA - Austin TX, US
Boon Yew LOW - Subang Jaya, MY
Akhilesh SINGH - Austin TX, US
International Classification:
H01L 23/495
H01L 23/31
Abstract:
A package device has a first lead frame having a first flag. A first integrated circuit is on the first flag. A first encapsulant is over the first integrated circuit. A first plurality of leads is electrically bonded to the first integrated circuit. A first lead of the first plurality of leads has an inner portion covered by the first encapsulant and an outer portion extending outside the encapsulant. The outer portion has a hole and a bend at the hole. The outer portion extends above the first encapsulant.

Method For Packaging An Integrated Circuit Device With Stress Buffer

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US Patent:
20170103905, Apr 13, 2017
Filed:
Oct 7, 2015
Appl. No.:
14/877467
Inventors:
- AUSTIN TX, US
NISHANT LAKHERA - AUSTIN TX, US
AKHILESH K. SINGH - AUSTIN TX, US
International Classification:
H01L 21/56
H01L 21/78
Abstract:
A method of fabricating a plurality of semiconductor devices includes attaching a plurality of integrated circuit (IC) die to a substrate including forming electric connections between contacts on the IC die and contacts on the substrate. After the IC die is attached to the substrate, a first encapsulating material is placed over stress-sensitive areas of the IC die. The first encapsulating material includes thirty percent or less of filler particles greater than a specified size. A second encapsulating material is placed over the first encapsulating material. The second encapsulating material includes sixty percent or more of filler particles.

Die Attachment For Packaged Semiconductor Device

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US Patent:
20170098597, Apr 6, 2017
Filed:
Dec 19, 2016
Appl. No.:
15/383521
Inventors:
- AUSTIN TX, US
RAMA I. HEGDE - AUSTIN TX, US
NISHANT LAKHERA - AUSTIN TX, US
International Classification:
H01L 23/495
H01L 21/56
H01L 25/065
H01L 23/00
H01L 23/31
Abstract:
A method for forming a packaged semiconductor device includes attaching a first major surface of a semiconductor die to a plurality of protrusions extending from a package substrate. A top surface of each protrusion has a die attach material, and the plurality of protrusions define an open region between the first major surface of the semiconductor die and the package substrate. Interconnects are formed between a second major surface of the semiconductor die and the package substrate in which the second major surface opposite the first major surface. An encapsulant material is formed over the semiconductor die and the interconnects.
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Nishant Lakhera from Austin, TX, age ~40 Get Report