Resumes
Resumes
Design Verification Engineer - Formal
View pageLocation:
670 east Gilbert St, San Bernardino, CA 92415
Industry:
Computer Hardware
Work:
Facebook
Design Verification Engineer - Formal
Oracle Oct 2015 - Jun 2017
Senior Verification Engineer
Google Oct 2015 - Jun 2017
Formal Verification Engineer
Oracle Jan 1, 2012 - Sep 2015
Verification Engineer at Oracle Corporation
Design Verification Engineer - Formal
Oracle Oct 2015 - Jun 2017
Senior Verification Engineer
Google Oct 2015 - Jun 2017
Formal Verification Engineer
Oracle Jan 1, 2012 - Sep 2015
Verification Engineer at Oracle Corporation
Education:
University of Southern California 2010 - 2012
Masters, Electrical Engineering
Masters, Electrical Engineering
Skills:
Perl
C
C++
Verilog
Debugging
Unix
Linux
Test Automation
Testing
Systemverilog
C
C++
Verilog
Debugging
Unix
Linux
Test Automation
Testing
Systemverilog
Nirav Sutaria
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