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Nael O Zohni

from Las Vegas, NV
Age ~50
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Also known as:
Neil O Zohni, Zohni O Nael, Neal Zohni, Nael Zohn, Nael Zahni, Zohni Nael, Nael L, Nael I
Related to:
Jennifer T Yun, 40
Connected to:
Maida Zohorovic, 39Joseph A Zohr, 35Rita F Zohrabian, 68Albrik A Zohrabyan, 42Mohammad Zohrehvand, 41Steven J Zohrer, 41Izzat M Zoibi, 92Laura N Zoibi, 37Cristina A Zoida, 48Alexis S Zois, 30

Nael Zohni Phones & Addresses

  • Las Vegas, NV
  • Riverview, FL
  • 128 John Kirk Ct, Campbell, CA 95008
  • 1756 Cheney Dr, San Jose, CA 95128
  • 1101 Stevens Ave, Santa Ana, CA 92707
  • Newark, CA
  • Maynard, MA
  • Hillsboro Bch, FL
  • PO Box 26491, San Jose, CA 95159

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Nael Zohni Photo 1

Nael Zohni

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Location:
P/O Box 26491, San Jose, CA
Interests:
Donor

Publications

Us Patents

Electronic Assembly With Trenches For Underfill Material

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US Patent:
8228682, Jul 24, 2012
Filed:
Aug 20, 2010
Appl. No.:
12/860826
Inventors:
Nael Zohni - Campbell CA, US
Thomas B. Templeton - San Francisco CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H05K 7/00
H01L 23/48
US Classification:
361782, 361760, 361783, 257734, 257737
Abstract:
An electronic assembly includes a substrate having bond pads on a surface of the substrate. A solder mask covers the surface of the substrate, and a solder connection is disposed on each of the bond pads. At least one trench is formed in the solder mask, and is located between adjacent ones of the bond pads. At least one component has contact pads, and each contact pad is connected to one of the bond pads via one of the solder connections. The trench is located beneath the device and extends at least from one edge of the device to a location underneath the device. Underfill material fills the trench and space between the solder mask and the device.

Apparatus And Method Of Semiconductor Wafer Protection

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US Patent:
6540467, Apr 1, 2003
Filed:
Jun 18, 2001
Appl. No.:
09/884006
Inventors:
Nael O. Zohni - Newark CA
Clifford Fishley - San Jose CA
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
B65D 134
US Classification:
414275, 414810, 414940, 206710
Abstract:
A system and a method are provided for preventing damage to wafers arranged in a wafer cassette. In particular, an apparatus is provided to protect wafers arranged in a wafer cassette during insertion of a wafer into the cassette. In one embodiment, the apparatus may be a separate entity from the wafer cassette. In this manner, the apparatus may be situated about the cassette such that the wafers arranged in the cassette are protected during insertion of a wafer. In another embodiment, the wafer cassette itself may be adapted to partially cover and protect the wafers arranged in the cassette during insertion of a wafer. Consequently, a method is provided using either embodiment of the apparatus. In particular, the method may include inserting a wafer into a wafer cassette by shielding one or more slots of the cassette, exposing a designated slot of the cassette, and inserting a wafer into the designated slot.

Stacked Silicon Package Assembly Having An Enhanced Lid

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US Patent:
20170092619, Mar 30, 2017
Filed:
Sep 28, 2015
Appl. No.:
14/867349
Inventors:
- San Jose CA, US
Tien-Yu Lee - San Jose CA, US
Ferdinand F. Fernandez - San Jose CA, US
Suresh Ramalingam - Fremont CA, US
Ivor G. Barber - Los Gatos CA, US
Inderjit Singh - Saratoga CA, US
Nael Zohni - San Jose CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H01L 25/065
H01L 23/06
H01L 23/373
H01L 25/00
H01L 23/00
H01L 23/10
H01L 23/367
Abstract:
A method and apparatus are provided which improve heat transfer between a lid and an IC die of an IC (chip) package. In one embodiment, a chip package is provided that includes a first IC die, a package substrate, a lid and a stiffener. The first IC die is coupled to the package substrate. The stiffener is coupled to the package substrate and circumscribes the first IC die. The lid has a first surface and a second surface. The second surface faces away from the first surface and towards the first IC die. The second surface of the lid is conductively coupled to the IC die, while the lid is mechanically decoupled from the stiffener.
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Nael O Zohni from Las Vegas, NV, age ~50 Get Report