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Jay W Chan

from San Francisco, CA
Age ~60
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Also known as:
N Chan
Related to:
Robert B Chen, 51Yang Y ChaoyangLela ChanJachin Chan
Connected to:
Abraham Chan, 34Adeline S Chan, 66Aegean H Chan, 40Aldo K Chan, 67Alen Chan, 48Alexa Chan, 31Alexius C Chan, 80Ali Chan, 54Allyson Chan, 55Alma S Chan, 37

Jay Chan Phones & Addresses

  • San Francisco, CA
  • Goleta, CA
  • Oakland, CA

Resumes

Resumes

Jay Chan Photo 1

Engineering Manager

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Location:
San Francisco, CA
Industry:
Internet
Work:
Eventbrite
Engineering Manager
Eventbrite Aug 2011 - Jan 2019
Software Engineer
Cisco Jan 1, 2008 - Aug 1, 2011
Software Engineer
Education:
Uc San Diego 2004 - 2007
Bachelors, Bachelor of Science, Computer Science, Linguistics, Music, Engineering, Computer Science and Engineering
Skills:
Hadoop
Git
Mapreduce
Python
Hive
Django
Hbase
Scalability
Distributed Systems
Javascript
Mysql
Mongodb
Solr
Agile Methodologies
Jquery
Perl
Languages:
Cantonese
Jay Chan Photo 2

Rf Mems Reliability And Product Engineer

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Location:
Berkeley, CA
Industry:
Semiconductors
Work:
Qorvo, Inc.
Rf Mems Reliability and Product Engineer
Cavendish Kinetics
Mems Reliability and Product Engineer
Qualcomm Nov 2005 - Oct 2011
Product Reliability Engineer
Amd Jul 1997 - Oct 2005
Device Reliability Engineer
Education:
The University of Texas at Austin 1987 - 1993
Skills:
Reliability
Mems
Jay Chan Photo 3

Director Of Operations

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Work:
Investors Group
Director of Operations
Jay Chan Photo 4

Jay Chan

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Location:
San Francisco, CA
Industry:
Information Technology And Services
Jay Chan Photo 5

Jay Chan

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Location:
San Francisco, CA
Industry:
Computer Software
Jay Chan Photo 6

Research Engineer

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Location:
San Francisco, CA
Industry:
Computer Software
Work:
Ibm
Research Engineer
Jay Chan Photo 7

Jay Chan

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Location:
San Francisco Bay Area
Industry:
Information Technology and Services
Jay Chan Photo 8

Jay Chan

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Location:
Other
Industry:
Banking

Publications

Us Patents

Structure And Method For Increasing Accuracy In Predicting Hot Carrier Injection (Hci) Degradation In Semiconductor Devices

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US Patent:
6798230, Sep 28, 2004
Filed:
Jan 15, 2003
Appl. No.:
10/346461
Inventors:
Kurt Taylor - San Jose CA
Jay Chan - San Francisco CA
Eugene Zhao - Sunnyvale CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G01R 3128
US Classification:
324763, 324765, 324769
Abstract:
Aspects for increasing accuracy in predicting HCI degradation in semiconductor devices are described. The aspects include a gated ring oscillator structure utilized to perform HCI degradation testing with controlling of the gated ring oscillator structure to isolate voltage acceleration degradation from frequency degradation directly during the HCI degradation testing. Further included is a plurality of ring oscillators coupled in series, and first and second control logic for the plurality of ring oscillators for enabling selection of gated operation of the plurality of ring oscillators, wherein each ring oscillator performs a same number of transitions to allow an accurate assessment of HCI degradation based solely on voltage acceleration.
Control profile
Jay W Chan from San Francisco, CA, age ~60 Get Report