Paul James Morgan

6399492, Jun 4, 2002

Mar 15, 2001

09/810008

Michael T. Andreas - Boise ID
Paul A. Morgan - Kuna ID

Micron Technology, Inc. - Boise ID

H01L 2144

438682, 438686

The invention includes methods of processing ruthenium silicide. In one implementation, a ruthenium silicide processing method sequentially includes forming ruthenium silicide over front and back sides of a semiconductor substrate. The backside ruthenium silicide is exposed to a chlorine and fluorine containing aqueous solution effective to remove at least some ruthenium silicide therefrom. Then, the substrate backside is exposed to an aqueous ruthenium oxide etchant solution. Then, the substrate backside is exposed to an aqueous hydrofluoric acid containing solution.

6417016, Jul 9, 2002

Feb 26, 1999

09/261477

Terry L. Gilton - Boise ID
Paul A. Morgan - Kuna ID

Micron Technology, Inc. - Boise ID

H01J 902

438 20, 445 24, 445 50

Improved methods and structures are provided for an array of vertical geometries which may be used as emitter tips, as a self aligned gate structure surrounding field emitter tips, or as part of a flat panel display. The present invention offers controlled size in emitter tip formation under a more streamlined process. The present invention further provides a more efficient method to control the gate to emitter tip proximity in field emission devices. The novel method of the present invention includes implanting a dopant in a patterned manner into the silicon substrate and anodizing the silicon substrate in a controlled manner causing a more heavily doped region in the silicon substrate to form a porous silicon region. Controlling the anodization of the silicon substrate further regulates and defines the shape to less heavily doped regions in the silicon substrate which form vertical geometries that can be used as emitter tips. One method of the present invention provides a self-aligned gate structure around emitter tips.

6589882, Jul 8, 2003

Oct 24, 2001

10/083035

Michael T. Andreas - Boise ID
Paul A. Morgan - Kuna ID

Micron Technology, Inc. - Boise ID

H01L 21461

438745, 438637, 438638, 438639, 438640, 438622, 438623, 438624, 438687, 438704, 438746, 438747, 438748, 438750, 438781, 438756, 438757, 216 17, 216100, 216101, 216102, 216103, 216104, 216105, 216106, 216107, 216108, 216109

The invention includes a method of cleaning a surface of a copper-containing material by exposing the surface to an acidic mixture comprising NO , F and one or more organic acid anions having carboxylate groups. The invention also includes a semiconductor processing method of forming an opening to a copper-containing material. A mass is formed over a copper-containing material within an opening in a substrate. The mass contains at least one of an oxide barrier material and a dielectric material. A second opening is etched through the mass into the copper-containing material to form a base surface of the copper-containing material that is at least partially covered by particles comprising at least one of a copper oxide, a silicon oxide or a copper fluoride. The base surface is cleaned with a solution comprising nitric acid, hydrofluoric acid and one or more organic acids to remove at least some of the particles.

6645874, Nov 11, 2003

May 24, 2001

09/864482

Kevin J. Torek - Meridian ID
Jonathan C. Morgan - Nampa ID
Paul A. Morgan - Kuna ID

Micron Technology, Inc. - Boise ID

H01L 21302

438723, 438748, 134 13

An apparatus and method for delivering ozone to a workpiece. In one embodiment, fluid is sprayed onto a workpiece placed in an ozone-rich environment. Alternatively, ozone is mixed with the fluid prior to spraying the fluid onto the workpiece. When spraying the fluid, the invention pulses the fluid at desired rates to create a substantially uniform layer of ozone-rich fluid on the workpiece. In another embodiment, the workpiece is also slowly rotated during at least a portion of the time the layer of ozone-rich fluid is applied to the workpiece.

6653243, Nov 25, 2003

May 25, 2000

09/579333

Paul A. Morgan - Kuna ID

Micron Technology, Inc. - Boise ID

H01L 21461

438745, 438637, 438687, 438754, 438756, 134 13, 216 17, 216106, 216107

The invention encompasses a semiconductor processing method of cleaning a surface of a copper-containing material by exposing the surface to an acidic mixture comprising Cl , NO and F. The invention also includes a semiconductor processing method of forming an opening to a copper-containing substrate. Initially, a mass is formed over the copper-containing substrate. The mass comprises at least one of a silicon nitride and a silicon oxide. An opening is etched through the mass and to the copper-containing substrate. A surface of the copper-containing substrate defines a base of the opening, and is referred to as a base surface. The base surface of the copper-containing substrate is at least partially covered by at least one of a copper oxide, a silicon oxide or a copper fluoride. The base surface is cleaned with a cleaning solution comprising hydrochloric acid, nitric acid and hydrofluoric acid to remove at least some of the at least one of a copper oxide, a silicon oxide or a copper fluoride from over the base surface.

6737283, May 18, 2004

Aug 29, 2002

10/230191

Paul A. Morgan - Kuna ID

Micron Technology, Inc. - Boise ID

H01L 2100

438 3, 438238, 438381, 257295, 257659

An MRAM cell and a method of forming the an MRAM cell minimizes the occurrence of electrical shorts along the side walls of the stacked cell structure during fabrication. Specifically, a first conductor is provided in a trench in an insulating layer, and then an upper surface of the insulating layer and the first conductor are planarized. Next, as the layers forming the stacks of the MRAM cells are deposited on the planarized insulating layer and first conductor, the critical layers are physically separated from adjacent layers at regions surrounding an interior region of the stacked layers. The stacked layers at the interior region form an MRAM cell, while the separated edges prevent conductive layers from being formed along the sidewalls of the MRAM cell due to sputtering during the etching process(es) performed to define the cell.

6756682, Jun 29, 2004

Mar 3, 2003

10/376280

Nishant Sinha - Boise ID
Paul A. Morgan - Kuna ID

Micron Technology, Inc. - Boise ID

H01L 2940

257774, 257763, 257766

A method is described for filling of high aspect ratio contact vias provided over silicon containing areas. A via is formed in an insulating layer over the silicon containing area and a silicide forming material is deposited in the via. A silicide region is formed over the silicon containing area, the silicide forming material is removed from the via leaving the silicide region. The via is then filled with a conductor using an electroless plating process.

6758938, Jul 6, 2004

Aug 31, 1999

09/386247

Kevin J. Torek - Meridian ID
Jonathan C. Morgan - Nampa ID
Paul A. Morgan - Kuna ID

Micron Technology, Inc. - Boise ID

H01L 21306

15634511, 15634518, 15634521, 15634526, 15634533, 15634534

An apparatus and method for delivering ozone to a workpiece. In one embodiment, fluid is sprayed onto a workpiece placed in an ozone-rich environment. Alternatively, ozone is mixed with the fluid prior to spraying the fluid onto the workpiece. When spraying the fluid, the invention pulses the fluid at desired rates to create a substantially uniform layer of ozone-rich fluid on the workpiece. In another embodiment, the workpiece is also slowly rotated during at least a portion of the time the layer of ozone-rich fluid is applied to the workpiece.